Dynamic logic has become a niche approach in circuit design, mainly due to the reliability limitations that have been aggravated with process down-scaling. To that extent, the performance and area benefits of dynamic design approaches, such as the integration of the Clocked CMOS (C$^{2}$MOS) approach, are left on the table. In this article, we propose employing the Three-Independent-Gate Field-Effect Transistor (TIGFET) technology for the implementation of the C$^\text{2}$MOS approach, which we call the Clocked Complementary TIG (C$^\text{2}$TIG) approach. Electrical simulations at 22nm demonstrate the enhanced robustness of the C$^\text{2}$TIG approach, while providing gains in power, performance, and area. Finally, new design opportunities for synchronous systems are demonstrated with the C$^\text{2}$TIG approach.

中文翻译：

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C2TIG：基于三独立栅极场效应晶体管的动态 C2MOS 设计

动态逻辑已成为电路设计中的一种利基方法，这主要是由于随着工艺规模缩小而加剧的可靠性限制。在这种程度上，动态设计方法的性能和面积优势，例如时钟 CMOS (C$^{2}$MOS）方法，都留在了桌子上。在本文中，我们建议采用三独立栅极场效应晶体管 (TIGFET) 技术来实现 C$^\文本{2}$MOS 方法，我们称之为时钟互补 TIG (C$^\文本{2}$TIG) 方法。22nm 的电气模拟证明了 C 的增强的鲁棒性$^\文本{2}$TIG 方法，同时提供功率、性能和面积方面的收益。最后，使用 C 语言展示了同步系统的新设计机会$^\文本{2}$TIG 方法。