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True Random Number Generator Integration in a Resistive RAM Memory Array using Input Current Limitation
IEEE Transactions on Nanotechnology ( IF 2.4 ) Pub Date : 2020-01-01 , DOI: 10.1109/tnano.2020.2976735
Hassen Aziza , Jeremy Postel-Pellerin , Hussein Bazzi , Pierre Canet , Mathieu Moreau , Vincenzo Della Marca , Adnan Harb

A novel True Random Number Generator circuit fabricated in a 130 nm HfO2-based resistive RAM process is presented. The generation of the random bit stream is based on a specific programming sequence applied to a dedicated memory array. In the proposed programming scheme, all the cells of the memory array are addressed at the same time while the current provided to the circuit is limited to program only a subset of the memory array, resulting in a stochastic distribution of cell resistance values. Some cells are switched in a low resistive state, other cells are slightly programmed to reach an intermediate resistance state, while the remaining cells maintain their initial high resistance state. Resistance values are next converted into a bit stream and confronted to National Institute of Standards and Technology (NIST) test benchmarks. The generated random bit stream has successfully passed twelve NIST tests out of fifteen. Compared to state-of-the-art resistive RAM-based true random number generators, our proposed methodology is the first one to leverage on programming current limitation at a memory array level.

中文翻译:

使用输入电流限制在电阻式 RAM 存储器阵列中集成真随机数发生器

介绍了一种采用 130 nm 基于 HfO2 的电阻式 RAM 工艺制造的新型真随机数发生器电路。随机位流的生成基于应用于专用存储器阵列的特定编程序列。在所提出的编程方案中,存储器阵列的所有单元同时被寻址,而提供给电路的电流被限制为仅编程存储器阵列的子集,从而导致单元电阻值的随机分布。一些单元被切换到低电阻状态,其他单元被稍微编程以达到中间电阻状态,而其余单元保持它们的初始高电阻状态。接下来将电阻值转换为比特流并与美国国家标准与技术研究院 (NIST) 测试基准进行对比。生成的随机比特流已成功通过了 15 项中的 12 项 NIST 测试。与最先进的基于电阻式 RAM 的真随机数发生器相比,我们提出的方法是第一个利用存储器阵列级别的编程电流限制的方法。
更新日期:2020-01-01
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