This brief presents, a fully integrated low-dropout regulator (LDO) with 50-mV dropout voltage for high power efficiency, with a LDO-self-supplied differential error amplifier (EA) for higher power supply rejection (PSR), and a coupled transient enhancement unit for fast transient response. With 50-mV dropout voltage, the LDO can achieve 94.4% power efficiency in the full load condition. The LDO is fabricated in a standard 28-nm bulk CMOS process with 0.0086-mm2 active area. It features a 288-MHz unity-gain bandwidth (UGB) at 20-mA load current, while consuming a quiescent current of 33 ${\mu }\text{A}$ . With such high bandwidth and the coupled transient enhancement unit, the proposed LDO achieves 270-ps response time for a 0-to-20-mA load transient with 100-ps edge time. The self-supplied EA helps to achieve a PSR of −30 dB even with only 50-mV dropout. The ultra-fast response, small area, and high efficiency features make the proposed LDO very suitable for working as distributed point-of-load regulators in a digital system.

中文翻译：

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具有 50mV 压差的全集成 LDO，用于优化电源效率

本简介介绍了一个完全集成的低压差稳压器 (LDO)，其压差为 50mV 以实现高电源效率，一个 LDO 自供电差分误差放大器 (EA) 提供更高的电源抑制 (PSR)，以及一个耦合用于快速瞬态响应的瞬态增强单元。借助 50mV 压差，LDO 在满负载条件下可实现 94.4% 的电源效率。LDO 采用标准 28 纳米体 CMOS 工艺制造，有效面积为 0.0086 平方毫米。它在 20 mA 负载电流下具有 288 MHz 单位增益带宽 (UGB)，同时消耗 33 ${\mu }\text{A}$ 的静态电流。凭借如此高的带宽和耦合瞬态增强单元，建议的 LDO 可实现 270 ps 响应时间，用于 0 至 20 mA 负载瞬态，边缘时间为 100 ps。即使只有 50mV 的压差，自供电 EA 也有助于实现 −30 dB 的 PSR。超快响应、小面积和高效率特性使所提议的 LDO 非常适合用作数字系统中的分布式负载点稳压器。