A novel and promising candidate for the main building block of the 2-bit, 360° phase shifters, namely, the fixed physical length, spoof surface plasmon polariton (sSPP) delay lines, is presented. An analytical approach is used for the calculation of the electrical lengths of the sSPP delay lines for what we believe is the first time. The delay lines use the idea of changing the corrugation depths of the sSPP waveguides (WGs), which allows us to obtain different electrical lengths without changing the physical length of the WG. The special design of the coplanar WG to sSPP WG transitions maintains the mode conversion under different phase states and minimizes the insertion and return losses for all phase states. The measurement results of the fabricated delay lines for four different phase states show good agreement with the simulations, having average and maximum phase errors of 1.7% and 3.6% with respect to the ideal phase states, 0.5% and 1.2% with respect to the simulations, and average and maximum insertion losses of $ - {0}.{26}$ and $ - {0}.{43}\;{\rm dB}$ at 7.15 GHz, respectively. The proposed designs, to the best of our knowledge, are the first instances of the sSPP delay lines for low-loss, high-accuracy, compact phase shifters with real-life design constraints.

中文翻译：

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用于2位移相器的固定物理长度欺骗表面等离振子极化延迟线

提出了一种新颖的，有前途的候选方案，用于2位360°移相器的主要构建模块，即固定的物理长度，欺骗性表面等离振子极化（sSPP）延迟线。我们认为这是首次使用分析方法来计算sSPP延迟线的电气长度。延迟线使用更改sSPP波导（WG）的波纹深度的想法，这使我们能够获得不同的电气长度，而无需更改WG的物理长度。共面WG到sSPP WG过渡的特殊设计可在不同相位状态下保持模式转换，并使所有相位状态的插入损耗和返回损耗最小。四种不同相位状态下制作的延迟线的测量结果与仿真结果吻合良好，$-{0}。{26} $和$-{0}。{43} \; {\ rm dB} $分别位于7.15 GHz。据我们所知，拟议的设计是针对具有实际设计约束的低损耗，高精度，紧凑型移相器的sSPP延迟线的首例。