This paper presents a novel design methodology to turn the timing violation caused by aging into computation approximation error without the reliability guardband or increasing the supply voltage. It can be realized by accurately monitoring the critical path delay at run-time. We evaluate the proposal at two levels: RTL component level and system level. The experimental results at the RTL component level show a significant improvement in terms of (normalized) mean squared error caused by timing violation, and those at the system level show that the proposed approach successfully transforms the aging-induced timing violation errors into much less harmful computation approximation errors, and thus it recovers image quality up to perceptually acceptable levels. It reduces the dynamic and static power consumptions by 21.45% and 10.78%, respectively, with 0.8% area overhead compared to the conventional approach.

中文翻译：

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动态计算近似的老化补偿

本文提出了一种新颖的设计方法，可以将老化引起的时序违规转化为计算近似误差，而无需可靠性保护带或增加电源电压。它可以通过在运行时准确监控关键路径延迟来实现。我们在两个级别评估提案：RTL 组件级别和系统级别。RTL 组件级别的实验结果表明，时序违规引起的（归一化）均方误差有显着改善，系统级别的实验结果表明，所提出的方法成功地将老化引起的时序违规错误转化为危害较小的计算近似误差，因此它将图像质量恢复到感知可接受的水平。它分别降低了21.45%和10.78%的动态和静态功耗，