The insistent trend in today's nanoscale technology, to keep abreast of the Moore's law, has been continually opening up newer challenges to circuit designers. With rapid downscaling of integration, the intricacies involved in the manufacturing process have escalated significantly. Concomitantly, the nature of defects in silicon chips has become more complex and unpredictable, adding further difficulty in circuit testing and diagnosis. The volume of test data has surged and the parameters that govern testing of integrated circuits have increased not only in dimension but also in the complexity of their correlation. Evidently, the current scenario serves as a pertinent platform to explore new test solutions based on machine learning. In this survey, we look at various recent advances in this evolving domain in the context of digital logic testing and diagnosis.

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基于机器学习的数字电路测试概述

为了与摩尔定律保持同步，当今的纳米技术一直在不断向电路设计人员提出新的挑战。随着集成度的快速降低，制造过程中涉及的复杂性已大大提高。随之而来的是，硅芯片中缺陷的性质变得更加复杂和不可预测，这进一步增加了电路测试和诊断的难度。测试数据的数量激增，控制集成电路测试的参数不仅在尺寸上增加，而且在相关性方面也越来越复杂。显然，当前场景是探索基于机器学习的新测试解决方案的相关平台。在这项调查中