Effects of additional thermal budget associated with a three-dimensional (3D) fabrication sequence are evaluated for the total-ionizing dose radiation response of fully depleted silicon-on-insulator (FD-SOI) MOSFETs. Current-voltage and low-frequency (1/ ${f}$ ) noise measurements are compared for (1) conventional planar FD-SOI MOSFETs, and (2) MOSFETs formed in the bottom layer of the 3D process and subjected to the process steps associated with formation of a second active layer. Similar radiation-induced voltage shifts and increases of 1/ ${f}$ noise are observed after irradiation for both types of structures. These similar changes in response show that the additional thermal processing involved with 3D fabrication has little effect on border-trap densities and radiation-induced charge trapping in gate and/or buried oxides of MOSFETs formed in the bottom layer of the 3D process.

中文翻译：

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3D 顺序集成、完全耗尽的绝缘体上硅 MOSFET 的总电离剂量效应

针对完全耗尽的绝缘体上硅 (FD-SOI) MOSFET 的总电离剂量辐射响应，评估了与三维 (3D) 制造序列相关的额外热预算的影响。电流-电压和低频（1/ ${f}$ ) 比较 (1) 传统平面 FD-SOI MOSFET 和 (2) MOSFET 的噪声测量结果，该 MOSFET 形成于 3D 工艺的底层并经过与第二有源层的形成相关的工艺步骤。类似的辐射感应电压偏移和增加 1/ ${f}$ 两种类型的结构在辐照后都观察到噪声。这些类似的响应变化表明，与 3D 制造相关的额外热处理对边界陷阱密度和辐射诱导的电荷俘获几乎没有影响，这些电荷俘获在 3D 工艺底层中形成的 MOSFET 的栅极和/或掩埋氧化物中。