This paper presents an in-memory computing (IMC) architecture for image denoising. The proposed SRAM based in-memory processing framework works in tandem with approximate computing on a binary image generated from neuromorphic vision sensors. Implemented in TSMC 65nm process, the proposed architecture enables approximately 2000X energy savings (approximately 222X from IMC) compared to a digital implementation when tested with the video recordings from a DAVIS sensor and achieves a peak throughput of 1.25-1.66 frames/us.

中文翻译：

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65nm CMOS 中的 75kb SRAM 用于基于内存计算的神经形态图像去噪

本文提出了一种用于图像去噪的内存计算 (IMC) 架构。提出的基于 SRAM 的内存处理框架与对从神经形态视觉传感器生成的二进制图像进行近似计算协同工作。在使用 DAVIS 传感器的视频记录进行测试时，所提议的架构以 TSMC 65nm 工艺实施，与数字实施相比，节能大约 2000 倍（IMC 的大约 222 倍），并实现了 1.25-1.66 帧/us 的峰值吞吐量。