With the rapid development of technology scaling and cell density improvement for capacity increase and cost reduction, nand flash memory is confronted with degraded reliability. On one hand, while low-density parity-check (LDPC) codes have been deployed in today's nand flash memories to enhance reliability, flash read latency has still been a performance bottleneck with the increased raw bit error rates (RBER). On the other hand, significant process variations (PV) have been found on existing nand flash memories, which introduce great reliability variations among different flash blocks. Recent studies have proposed to exploit PV to improve endurance by better wear leveling or to improve write performance. These approaches are prone to allocate read data to blocks with low reliability, which further degrades read performance. This paper proposes to enhance read performance of LDPC-equipped nand flash memory by exploiting the reliability variations from PV. The paper consists of three parts. First, a block grouping approach is presented to categorize flash blocks according to their reliability. Second, according to the grouping scheme, a data placement scheme is proposed, which allocates read-hot data to flash blocks with high reliability. At the same time, the read-cold data is moved to blocks with low reliability. As a result, the read performance is enhanced. However, allocating high reliable blocks for read-hot data collides with previous PV-based wear leveling methods. To address the issue, the third part is a grouping partition scheme which limits the amount of high reliable blocks occupied by read-hot data. Therefore, read performance enhancement can be achieved and the wear leveling schemes will be impacted slightly. Experiment results present that, the proposed approach can provide significant read performance improvement on LDPC-equipped nand flash memory and is compatible with the previous PV-based wear leveling.

中文翻译：

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基于 LDPC 的 nand Flash 存储器的进程变化感知读取性能改进

随着技术规模化和单元密度提高以增加容量和降低成本的快速发展，NAND闪存面临着可靠性下降的问题。一方面，虽然低密度奇偶校验 (LDPC) 码已部署在当今的 nand 闪存中以提高可靠性，但随着原始比特错误率 (RBER) 的增加，闪存读取延迟仍然是性能瓶颈。另一方面，在现有的NAND闪存上发现了显着的工艺变化（PV），这在不同的闪存块之间引入了很大的可靠性变化。最近的研究提出利用 PV 来通过更好的磨损平衡来提高耐用性或提高写入性能。这些方法容易将读取数据分配给可靠性低的块，这进一步降低了读取性能。本文提出通过利用 PV 的可靠性变化来提高配备 LDPC 的 nand 闪存的读取性能。论文由三部分组成。首先，提出了一种块分组方法来根据其可靠性对闪存块进行分类。其次，根据分组方案，提出了一种数据放置方案，将读取热点数据分配给可靠性高的闪存块。同时，读取冷数据被移动到可靠性低的块中。结果，提高了读取性能。然而，为读取热数据分配高可靠块与之前基于 PV 的磨损均衡方法相冲突。为了解决这个问题，第三部分是一个分组分区方案，它限制了读热数据占用的高可靠块的数量。所以，可以实现读取性能增强，并且磨损均衡方案将受到轻微影响。实验结果表明，所提出的方法可以显着提高配备 LDPC 的 nand 闪存的读取性能，并且与以前的基于 PV 的磨损均衡兼容。