This paper presents a G-band on-off-keying transmitter and a G-Band receiver in 65-nm bulk CMOS process. The proposed transmitter includes a high-efficiency push–push voltage-controlled oscillator (VCO) with body-bias and a switch-based modulator using the folded coupled-line topology. The benefits of the folded coupled-line in switch design are theoretically analyzed and proved. The receiver utilized a topology based on envelope detector and inverter-chain-based output buffer. The standalone VCO demonstrates a peak dc-RF efficiency of 4.1% at 209 GHz with 1.02 dBm output power. The switch-based modulator performs a minimum insertion loss of 1.6 dB with isolation better than 21 dB. The transmitter exhibits a maximum output power of −0.04 dBm at 208 GHz with 3% efficiency and a phase noise of −84.9 dBc at 1-MHz offset. The transmitter and receiver achieve 7.5-Gb/s errorless [bit error rate (BER) < 1 × 10−12] data rate with 1.73 pJ/b energy efficiency and 9 Gb/s with 1 × 10−4 BER in loop-back test. The results of both the transmitter/receiver and standalone components show competitive performances at the frequency over 200 GHz among the designs in CMOS process.

中文翻译：

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用于 65 纳米 CMOS 互连系统的 G 波段开关键控低功率发射器和接收器

本文介绍了采用 65 纳米体 CMOS 工艺的 G 波段开关键控发射器和 G 波段接收器。所提出的发射器包括一个具有体偏置的高效推-推压控振荡器 (VCO) 和一个使用折叠耦合线拓扑的基于开关的调制器。从理论上分析并证明了折叠耦合线在开关设计中的好处。接收器采用基于包络检测器和基于反相器链的输出缓冲器的拓扑。独立 VCO 在 209 GHz 和 1.02 dBm 输出功率下的峰值 dc-RF 效率为 4.1%。基于开关的调制器的最小插入损耗为 1.6 dB，隔离度优于 21 dB。发射机在 208 GHz 时的最大输出功率为 -0.04 dBm，效率为 3%，相位噪声为 -84.9 dBc 在 1-MHz 偏移。发送器和接收器实现 7.5 Gb/s 无误码 [误码率 (BER) < 1 × 10−12] 数据速率，1.73 pJ/b 能效和 9 Gb/s，环回 1 × 10−4 BER测试。发射器/接收器和独立组件的结果在 200 GHz 以上的频率下显示出在 CMOS 工艺设计中具有竞争力的性能。