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TeraPHY: A Chiplet Technology for Low-Power, High-Bandwidth In-Package Optical I/O
IEEE Micro ( IF 3.6 ) Pub Date : 2020-03-01 , DOI: 10.1109/mm.2020.2976067
Mark Wade 1 , Erik Anderson 1 , Shahab Ardalan 1 , Pavan Bhargava 1 , Sidney Buchbinder 1 , Michael L. Davenport 1 , John Fini 1 , Haiwei Lu 1 , Chen Li 1 , Roy Meade 1 , Chandru Ramamurthy 1 , Michael Rust 1 , Forrest Sedgwick 1 , Vladimir Stojanovic 1 , Derek Van Orden 1 , Chong Zhang 1 , Chen Sun 1 , Sergey Y. Shumarayev 2 , Conor O'Keeffe 2 , Tim T. Hoang 2 , David Kehlet 2 , Ravi V. Mahajan 2 , Matthew T. Guzy 2 , Allen Chan 2 , Tina Tran 2
Affiliation  

In this article, we present TeraPHY, a monolithic electronic–photonic chiplet technology for low power and low latency, multi-Tb/s chip-to-chip communications. Integration of the TeraPHY optical technology with open source advanced interconnect bus interface enables communication between chips at board, rack, and row level at the energy and latency cost of in-package interconnect. This enables the design of logically connected but physically separated large-scale and high-performance digital systems. The copackaging integration approach is demonstrated by integrating the TeraPHY die into the Intel Stratix10 FPGA multichip package.

中文翻译:

TeraPHY:用于低功耗、高带宽封装内光学 I/O 的小芯片技术

在本文中,我们介绍了 TeraPHY,这是一种用于低功耗和低延迟、多 Tb/s 芯片到芯片通信的单片电子光子小芯片技术。TeraPHY 光学技术与开源高级互连总线接口的集成使板级、机架级和行级芯片之间的通信能够以封装内互连的能量和延迟成本实现。这使得设计逻辑连接但物理分离的大规模和高性能数字系统成为可能。通过将 TeraPHY 管芯集成到英特尔 Stratix10 FPGA 多芯片封装中,演示了联合封装集成方法。
更新日期:2020-03-01
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