Neural network hardware is considered an essential part of future edge devices. In this paper, we propose a binary-weight spiking neural network (BW-SNN) hardware architecture for low-power real-time object classification on edge platforms. This design stores a full neural network on-chip, and hence requires no off-chip bandwidth. The proposed systolic array maximizes data reuse for a typical convolutional layer. A 5-layer convolutional BW-SNN hardware is implemented in 90nm CMOS. Compared with state-of-the-art designs, the area cost and energy per classification are reduced by 7$\times$ and 23$\times$, respectively, while also achieving a higher accuracy on the MNIST benchmark. This is also a pioneering SNN hardware architecture that supports advanced CNN architectures.

中文翻译：

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用于实时对象分类的高效二进制权重尖峰神经网络架构

神经网络硬件被认为是未来边缘设备的重要组成部分。在本文中，我们提出了一种二进制权重尖峰神经网络 (BW-SNN) 硬件架构，用于边缘平台上的低功耗实时对象分类。这种设计在片上存储了一个完整的神经网络，因此不需要片外带宽。所提出的脉动阵列最大化了典型卷积层的数据重用。5 层卷积 BW-SNN 硬件在 90nm CMOS 中实现。与最先进的设计相比，每个分类的面积成本和能量分别降低了 7$\times$ 和 23$\times$，同时在 MNIST 基准上也实现了更高的准确性。这也是一种开创性的 SNN 硬件架构，支持先进的 CNN 架构。