Approximate computing can be used in error-resilient applications to reduce power consumption and increase overall circuit performance. This article introduces two approximate dividers with restoring array-based architecture that achieve substantial hardware savings while maintaining high accuracy when compared to existing approximate designs. The first design replaces exact restoring divider cells with a proposed approximate cell in a column-wise fashion. The second design uses several rows of exact architecture to compute a partial remainder and then rounds and encodes the divisor and this partial remainder so that they may be used to express approximate outputs. A comprehensive accuracy and performance evaluation are performed for the proposed dividers as well as other state-of-the-art designs. When compared to an exact design, the proposed dividers have a reduced area and power consumption of 46 and 57 percent respectively while introducing minimal error. Furthermore, the trade-off between accuracy and improved performance is explored for various approximate dividers in order to determine which designs achieve the best compromise. The accuracy of the proposed dividers is then demonstrated using two image processing applications.

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使用不精确单元格和部分余数估计来近似恢复分频器

近似计算可用于容错应用，以降低功耗并提高整体电路性能。本文介绍了两种基于恢复阵列架构的近似除法器，与现有近似设计相比，它们在保持高精度的同时实现了大量的硬件节省。第一种设计以列方式用建议的近似单元替换精确恢复分隔单元。第二种设计使用几行精确架构来计算部分余数，然后对除数和部分余数进行舍入和编码，以便它们可用于表示近似输出。对建议的分频器以及其他最先进的设计进行了全面的精度和性能评估。与精确的设计相比，建议的分频器的面积和功耗分别减少了 46% 和 57%，同时引入的误差最小。此外，针对各种近似分频器探索了精度和改进性能之间的权衡，以确定哪些设计实现了最佳折衷。然后使用两个图像处理应用程序证明所提出的除法器的准确性。