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A two-step asymmetric alternate monotonic switching scheme for SAR ADCs
Analog Integrated Circuits and Signal Processing ( IF 1.4 ) Pub Date : 2020-03-11 , DOI: 10.1007/s10470-020-01615-y
Ke Chang , Pei Liu , Lei Dong , Guohe Zhang

Abstract

In this paper, a novel energy-efficient and area-efficient two-step asymmetric alternate monotonic switching procedure for successive approximation register ADCs, which consumes zero energy both in the first two comparison cycles and the proposed two-step-reset process, is presented. Due to the adoption of a multiplexing method after the MSB comparison, the connection between the sub-CDAC (LSBs array) and the main-CDAC (MSBs array) is re-established, hence less unit capacitors are switched for the first three decision cycles. Subsequently, two monotonic switching schemes can be alternately implemented in the proposed two-step CDAC array, resulting in an energy saving of 98.3% over the Vcm-based architecture. Moreover, besides employing an asymmetric structure for the CDAC, a LSB-splitting technique is applied in the sub-CDAC, thereby prominently reducing the CDAC area by 94.2% compared with the Vcm-based switching scheme.



中文翻译:

SAR ADC的两步非对称交替单调切换方案

摘要

本文针对连续逼近寄存器ADC提出了一种新颖的节能高效的两步非对称交替单调切换程序,该程序在前两个比较周期和拟议的两步复位过程中均消耗零能量。由于在MSB比较之后采用了多路复用方法,因此重新建立了子CDAC(LSB阵列)和主CDAC(MSB阵列)之间的连接,因此在前三个决策周期中切换的单位电容器更少。随后,可以在建议的两步CDAC阵列中交替实现两种单调切换方案,从而在V cm上节省了98.3%的能量基于架构。此外,除了对CDAC采用非对称结构之外,在子CDAC中还应用了LSB分离技术,从而与基于V cm的切换方案相比,CDAC面积显着减小了94.2%。

更新日期:2020-03-12
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