Abstract

A ring oscillator is an important circuit used to evaluate the performance limits of any digital technology. The advantages of Graphene field effect transistor (GFET) over current CMOS technologies make it a prominent candidate for future high-performance electronics. In this paper, a GFET model is implemented in Verilog-A, and GFET design and analysis of a ring oscillator are performed using advanced design system (ADS) tool. By using GFET ring oscillator, the designed circuit is simulated using a 0.18 µm GFET process in ADS environment. The results show that the power consumption is 9.98 mW, while the VCO generates 24.12 GHz at 1 V. The effect of Graphene channel length variations on the frequency span, power dissipation and phase noise of GFET ring oscillators are studied. The main performance characteristics of the ring oscillator are compared with CMOS technology. It is shown that a GFET ring oscillator gives a higher oscillation frequency and has more power dissipation.

中文翻译：

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基于单层石墨烯FET的环形振荡器

摘要

环形振荡器是用于评估任何数字技术性能极限的重要电路。与当前的CMOS技术相比，石墨烯场效应晶体管（GFET）的优势使其成为未来高性能电子产品的重要候选者。在本文中，在Verilog-A中实现了GFET模型，并使用高级设计系统（ADS）工具进行了GFET设计和环形振荡器的分析。通过使用GFET环形振荡器，可以在ADS环境中使用0.18 µm GFET工艺对设计的电路进行仿真。结果表明，功耗为9.98 mW，而VCO在1 V时产生24.12 GHz。研究了石墨烯沟道长度变化对GFET环形振荡器的频率跨度，功耗和相位噪声的影响。将环形振荡器的主要性能特征与CMOS技术进行了比较。结果表明，GFET环形振荡器具有更高的振荡频率和更大的功耗。