This article presents a measurement-based technique for estimating the parasitic inductances associated with the interconnection structures of a multichip power module (MCPM) at a finer granularity than has been previously demonstrated. The technique introduced here makes it possible to determine an estimate of the interconnect inductances at each individual die position within the module geometry. For this purpose, this technique leverages the measured input impedance of an MCPM in the frequency domain, which has been carefully shaped by employing discrete capacitors in place of a semiconductor die. An example of the proposed technique is provided for an MCPM with four die positions per switch position. The provided theoretical formulation is verified by its application to a physical test subject, which is designed to represent a generic MCPM. Owing to the efficiency of this extraction technique and the possibility of providing direct empirical validation for FEA-obtained estimates, the proposed approach is expected to be of particular interest to MCPM designers for use in design optimization.

中文翻译：

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多芯片功率模块的多支电感提取程序

本文提出了一种基于测量的技术，该技术以比以前已经证明的更精细的粒度估算与多芯片电源模块（MCPM）的互连结构相关的寄生电感。此处介绍的技术可以确定模块几何结构内每个单独芯片位置处的互连电感估计。为此，该技术利用了在频域中测得的MCPM输入阻抗，该阻抗已通过采用分立电容器代替半导体管芯进行了精心设计。对于每个开关位置具有四个裸片位置的MCPM，提供了所提出技术的示例。所提供的理论公式已通过将其应用于物理测试对象而得以验证，该物理测试对象旨在代表通用的MCPM。