The miniaturization of transistors down to 5nm and beyond, plus the increasing complexity of integrated circuits, significantly aggravate short channel effects, and demand analysis and optimization of more design corners and modes. Simulators need to model output variables related to circuit timing, power, noise, etc., which exhibit nonlinear behavior. The existing simulation and sign-off tools, based on a combination of closed-form expressions and lookup tables are either inaccurate or slow, when dealing with circuits with more than billions of transistors. In this work, we present CSM-NN, a scalable simulation framework with optimized neural network structures and processing algorithms. CSM-NN is aimed at optimizing the simulation time by accounting for the latency of the required memory query and computation, given the underlying CPU and GPU parallel processing capabilities. Experimental results show that CSM-NN reduces the simulation time by up to $6\times$ compared to a state-of-the-art current source model based simulator running on a CPU. This speedup improves by up to $15\times$ when running on a GPU. CSM-NN also provides high accuracy levels, with less than $2\%$ error, compared to HSPICE.

中文翻译：

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CSM-NN：基于电流源模型的逻辑电路仿真——一种神经网络方法

晶体管小型化到5nm及以上，加上集成电路复杂度的增加，显着加剧了短沟道效应，需要对更多的设计角和模式进行分析和优化。模拟器需要对与电路时序、功率、噪声等相关的输出变量进行建模，这些变量表现出非线性行为。在处理具有数十亿个晶体管的电路时，现有的基于封闭形式表达式和查找表组合的模拟和签核工具要么不准确，要么速度很慢。在这项工作中，我们提出了 CSM-NN，这是一种具有优化神经网络结构和处理算法的可扩展模拟框架。CSM-NN 旨在通过考虑所需内存查询和计算的延迟来优化模拟时间，鉴于底层的 CPU 和 GPU 并行处理能力。实验结果表明，与在 CPU 上运行的最先进的基于电流源模型的模拟器相比，CSM-NN 将模拟时间减少了 6 倍。在 GPU 上运行时，这种加速最多可提高 $15\times$。与 HSPICE 相比，CSM-NN 还提供高精度水平，误差小于 $2\%$。