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Novel Methods for Efficient Realization of Logic Functions Using Switching Lattices
IEEE Transactions on Computers ( IF 3.6 ) Pub Date : 2020-03-01 , DOI: 10.1109/tc.2019.2950663
Levent Aksoy , Mustafa Altun

Two-dimensional switching lattices including four-terminal switches are introduced as alternative structures to realize logic functions, aiming to outperform the designs consisting of one-dimensional two-terminal switches. Exact and approximate algorithms have been proposed for the problem of finding a switching lattice which implements a given logic function and has the minimum size, i.e., a minimum number of switches. In this article, we present an approximate algorithm, called janus, that explores the search space in a dichotomic search manner. It iteratively checks if the target function can be realized using a given lattice candidate, which is formalized as a satisfiability (SAT) problem. As the lattice size and the number of literals and products in the given target function increase, the size of a SAT problem grows dramatically, increasing the run-time of a SAT solver. To handle the instances that janus cannot cope with, we introduce a divide and conquer method called medea. It partitions the target function into smaller sub-functions, finds the realizations of these sub-functions on switching lattices using janus, and explores alternative realizations of these sub-functions which may reduce the size of the final lattice. Moreover, we describe the realization of multiple functions in a single lattice. Experimental results show that janus can find better solutions than the existing approximate algorithms, even than the exact algorithm which cannot determine a minimum solution in a given time limit. On the other hand, medea can find better solutions on relatively large size instances using a little computational effort when compared to the previously proposed algorithms. Moreover, on instances that the existing methods cannot handle, medea can easily find a solution which is significantly better than the available solutions.

中文翻译:

使用开关格有效实现逻辑功能的新方法

引入包括四端开关的二维开关格作为实现逻辑功能的替代结构,旨在优于由一维二维开关组成的设计。精确和近似算法已经被提出用于寻找实现给定逻辑函数并且具有最小尺寸,即最小数量的开关的开关格的问题。在本文中,我们提出了一种称为 janus 的近似算法,它以二分搜索方式探索搜索空间。它迭代地检查是否可以使用给定的格子候选来实现目标函数,这被形式化为可满足性 (SAT) 问题。随着给定目标函数中的格大小以及文字和乘积的数量增加,SAT 问题的规模急剧增加,增加 SAT 求解器的运行时间。为了处理 janus 无法处理的情况,我们引入了一种称为 medea 的分而治之的方法。它将目标函数划分为更小的子函数,使用 janus 在切换点阵上找到这些子函数的实现,并探索这些子函数的替代实现,这可能会减小最终点阵的大小。此外,我们描述了在单个晶格中实现多个功能。实验结果表明,janus可以找到比现有近似算法更好的解,甚至比不能在给定时间限制内确定最小解的精确算法更好。另一方面,与先前提出的算法相比,medea 可以使用少量计算工作在相对较大的实例上找到更好的解决方案。
更新日期:2020-03-01
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