Thermally varying hysteretic gate operation in few-layer ReS 2 and MoS 2 back gate field effect transistors (FETs) is studied and compared for memory applications. Clockwise hysteresis at room temperature and anti-clockwise hysteresis at higher temperature (373 K for ReS 2 and 400 K for MoS 2) are accompanied by step-like jumps in transfer curves for both forward and reverse voltage sweeps. Hence, a step-like conductance (STC) crossover hysteresis between the transfer curves for the two sweeps is observed at high temperature. Furthermore, memory parameters such as the RESET-to-WRITE window and READ window are defined and compared for clockwise hysteresis at low temperature and STC-type hysteresis at high temperature, showing better memory performance for ReS 2 FETs as compared to MoS 2 FETs. Smaller operating temperature and voltage along with larger READ and RESET-to-WRITE windows make ReS 2 FETs a better choice for thermally aided memory applications. Finally, temperature dependent Kelvin probe force microscopy measurements show decreasing (constant) surface potential with increasing temperature for ReS 2 ( MoS 2). This indicates less effective intrinsic trapping at high temperature in ReS 2, leading to earlier occurrence of STC-type hysteresis in ReS 2 FETs as compared to MoS 2 FETs with increasing temperature.Thermally varying hysteretic gate operation in few-layer ReS 2 and MoS 2 back gate field effect transistors (FETs) is studied and compared for memory applications. Clockwise hysteresis at room temperature and anti-clockwise hysteresis at higher temperature (373 K for ReS 2 and 400 K for MoS 2) are accompanied by step-like jumps in transfer curves for both forward and reverse voltage sweeps. Hence, a step-like conductance (STC) crossover hysteresis between the transfer curves for the two sweeps is observed at high temperature. Furthermore, memory parameters such as the RESET-to-WRITE window and READ window are defined and compared for clockwise hysteresis at low temperature and STC-type hysteresis at high temperature, showing better memory performance for ReS 2 FETs as compared to MoS 2 FETs. Smaller operating temperature and voltage along with larger READ and RESET-to-WRITE windows make ReS 2 FETs a better choice for thermally aided memory applications. Finally, temperat...

中文翻译：

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使用少层 ReS 2 晶体管增强热辅助存储器性能

研究了几层 ReS 2 和 MoS 2 背栅场效应晶体管 (FET) 中的热变化滞后栅极操作，并针对存储器应用进行了比较。室温下的顺时针滞后和较高温度下的逆时针滞后（ReS 2 为 373 K，MoS 2 为 400 K）伴随着正向和反向电压扫描的转移曲线的阶梯状跳跃。因此，在高温下观察到两次扫描的传递曲线之间的阶梯状电导 (STC) 交叉滞后。此外，定义了诸如 RESET-to-WRITE 窗口和 READ 窗口之类的存储器参数，并针对低温下的顺时针迟滞和高温下的 STC 型迟滞进行比较，与 MoS 2 FET 相比，ReS 2 FET 显示出更好的存储器性能。较小的工作温度和电压以及较大的 READ 和 RESET-to-WRITE 窗口使 ReS 2 FET 成为热辅助存储器应用的更好选择。最后，温度相关的开尔文探针力显微镜测量显示 ReS 2 (MoS 2) 随着温度升高而降低（恒定）表面电位。这表明在高温下 ReS 2 中的本征俘获效率较低，导致与 MoS 2 FET 相比，随温度升高在 ReS 2 FET 中更早出现 STC 型滞后。在少层 ReS 2 和 MoS 2 中的热变化滞后栅极操作背栅场效应晶体管 (FET) 被研究和比较用于存储器应用。室温下的顺时针滞后和较高温度下的逆时针滞后（ReS 2 为 373 K，MoS 2 为 400 K）伴随着正向和反向电压扫描的转移曲线的阶梯状跳跃。因此，在高温下观察到两次扫描的传递曲线之间的阶梯状电导 (STC) 交叉滞后。此外，定义了诸如 RESET-to-WRITE 窗口和 READ 窗口之类的存储器参数，并针对低温下的顺时针滞后和高温下的 STC 型滞后进行了比较，与 MoS 2 FET 相比，ReS 2 FET 显示出更好的存储性能。较小的工作温度和电压以及较大的 READ 和 RESET-to-WRITE 窗口使 ReS 2 FET 成为热辅助存储器应用的更好选择。最后，温...