Dynamic Circuit Specialization (DCS) is used to optimize parts of an application and switch between the specialized parts utilizing Partial Reconfiguration at the run-time. The time needed to reconfigure the FPGA is a limiting factor for DCS. The reconfiguration controller, such as Xilinx Hardware Internal Configuration Access Port (HWICAP), enables an embedded processor to read or write the configuration data into the FPGAs configuration memory through the Internal Configuration Access Port (ICAP). However, it introduces a consequential delay and uses a significant amount of FPGA resources such as LookUp Tables. It is thus the most power hungry part within the DCS system. In our previous contribution, we proposed the Micro-reconfigurable Configuration Access Port (MiCAP), a custom lightweight reconfiguration controller specifically designed to implement DCS on the Zynq-SoC FPGA platform, resulting in increased reconfiguration speed and reduced FPGA resources. Even though, both HWICAP and MiCAP suffer from a data-transfer bottleneck during reconfiguration resulting in a reduced throughput by a factor 20\(\times \) compared to the throughput the ICAP can handle. To further reduce the reconfiguration time, while keeping the DCS capabilities, we propose the MiCAP-Pro that has an AXI-DMA engine. The DMA increases the reconfiguration speed by a factor of 3 over the MiCAP and the HWICAP. However, this improvement costs about four times more FPGA resources than the HWICAP for the AXI-DMA engine. We also perform a power and energy analysis of the AXI-HWICAP, MiCAP and MiCAP-Pro. Our results show that the MiCAP and MiCAP-Pro consume nine and four times less energy than the AXI-HWICAP respectively.

中文翻译：

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MiCAP-Pro：用于动态电路专业化的高速定制重配置控制器

动态电路专业化（DCS）用于优化应用程序的各个部分，并在运行时利用部分重新配置在专用部分之间进行切换。重新配置FPGA所需的时间是DCS的限制因素。诸如Xilinx硬件内部配置访问端口（HWICAP）之类的重新配置控制器使嵌入式处理器能够通过内部配置访问端口（ICAP）读取配置数据或将配置数据写入FPGA配置存储器。但是，它引入了相应的延迟，并使用了大量的FPGA资源，例如LookUp Tables。因此，它是DCS系统中最耗电的部分。在先前的贡献中，我们提出了微可重新配置的配置访问端口（MiCAP），一个定制的轻量级重配置控制器，专门设计用于在Zynq-SoC FPGA平台上实现DCS，从而提高了重配置速度并减少了FPGA资源。即使在重新配置期间，HWICAP和MiCAP都存在数据传输瓶颈，导致吞吐量降低了20倍\（\ times \）与ICAP可以处理的吞吐量相比。为了进一步减少重新配置时间，同时保持DCS功能，我们建议使用具有AXI-DMA引擎的MiCAP-Pro。与MiCAP和HWICAP相比，DMA将重新配置速度提高了3倍。但是，与用于AXI-DMA引擎的HWICAP相比，这种改进所花费的FPGA资源大约多四倍。我们还将对AXI-HWICAP，MiCAP和MiCAP-Pro进行功率和能量分析。我们的结果表明，MiCAP和MiCAP-Pro的能耗分别比AXI-HWICAP少9倍和4倍。