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Linearizability on hardware weak memory models
Formal Aspects of Computing ( IF 1 ) Pub Date : 2019-11-15 , DOI: 10.1007/s00165-019-00499-8
Graeme Smith 1 , Kirsten Winter 1 , Robert J. Colvin 1
Affiliation  

Linearizability is a widely accepted notion of correctness for concurrent objects. Recent research has investigated redefining linearizability for particular hardware weak memory models, in particular for TSO. In this paper, we provide an overview of this research and show that such redefinitions of linearizability are not required: under an interpretation of specification behaviour which abstracts from weak memory effects, the standard definition of linearizability is sound and complete on all hardware weak memory models.We prove our result with respect to a definition of object refinement which takes a weak memory model as a parameter. The main consequence of our findings is that we can leverage the range of existing techniques and tools for standard linearizability when verifying concurrent objects running on hardware weak memory models.

中文翻译:

硬件弱内存模型的线性化

线性化是一个被广泛接受的并发对象正确性的概念。最近的研究调查了重新定义特定硬件弱内存模型的线性化,特别是 TSO。在本文中,我们对这项研究进行了概述,并表明不需要对线性化进行这种重新定义:在从弱记忆效应中抽象出来的规范行为的解释下,线性化的标准定义在全部硬件弱内存模型。我们证明了我们关于对象细化定义的结果,该定义将弱内存模型作为参数。我们发现的主要结果是,在验证在硬件弱内存模型上运行的并发对象时,我们可以利用现有技术和工具的范围来实现标准线性化。
更新日期:2019-11-15
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