This paper addresses the problem of mapping tasks onto an FPGA-based many-core platform where the cores typically have a limited amount of memory and thus should be frequently overlaid with a small program block that implements a task. In this regard, we propose a framework that takes integer linear programming (ILP) to find an optimal mapping of an application onto such a many-core platform at the task-level of granularity. The optimality is defined within the limits of our ILP model. The proposed framework is not only suitable for an application that can be accommodated on the available cores but also for a larger application (or even multiple applications) that needs more cores than what is provided by the platform. This is achieved by mapping different partitions of the application to the same set of cores and dynamically (during the life time of the application) overlaying a partition on another. The proposed mapping flow integrates scheduling, binding and place and route steps into one mapping process using an ILP formulation. Due to the slowness of ILP solutions, our solution is applicable at design time only. It is implemented using TOMLAB/CPLEX toolbox and we assess its efficacy on a set of 40 synthetic task graphs as well as some multimedia applications.

中文翻译：

---

在内存容量有限的情况下，将程序覆盖图最佳映射到多核平台上

本文解决了将任务映射到基于FPGA的多核平台上的问题，在该平台上，核通常具有有限的内存量，因此应经常将其与实现任务的小型程序块覆盖。在这方面，我们提出了一个框架，该框架采用整数线性编程（ILP）在粒度任务级别上将应用程序最佳映射到这样的多核平台上。最优性是在我们的ILP模型的范围内定义的。所提出的框架不仅适用于可以容纳在可用内核上的应用程序，而且还适用于需要比平台提供的内核更多的内核的大型应用程序（甚至多个应用程序）。这是通过将应用程序的不同分区映射到同一组内核并动态地（在应用程序的生命周期内）将一个分区覆盖在另一个内核上来实现的。拟议的映射流程集成了使用ILP公式将调度，绑定以及放置和路由步骤整合为一个映射过程。由于ILP解决方案的速度较慢，因此我们的解决方案仅在设计时适用。它是使用TOMLAB / CPLEX工具箱实现的，我们将在40个合成任务图以及一些多媒体应用程序上评估其有效性。