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Automated Generation of Machine Instruction Decoders
Programming and Computer Software ( IF 0.7 ) Pub Date : 2019-12-16 , DOI: 10.1134/s0361768819070065
N. Yu. Fokina , M. A. Solovev

Abstract

A method for the automated generation of machine instruction decoders for a wide range of processor architectures that uses the target architecture assembler is proposed. A software tool based on this method is implemented and tested on a number of microcontrollers, such as PIC16F877A, AVR, Tricore, and H8/300H.


中文翻译:

自动生成机器指令解码器

摘要

提出了一种自动生成用于使用目标体系结构汇编器的多种处理器体系结构的机器指令解码器的方法。基于该方法的软件工具已在PIC16F877A,AVR,Tricore和H8 / 300H等许多单片机上实现和测试。
更新日期:2019-12-16
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