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A Strategy for Optimizing Low Operating Voltage in a Silicon Biristor
IEEE Transactions on Nanotechnology ( IF 2.4 ) Pub Date : 2020-01-01 , DOI: 10.1109/tnano.2019.2956092
Jun Woo Son , Jae Hur , Wu-Kang Kim , Geon-Beom Lee , Yang-Kyu Choi

A pure silicon-based biristor with low latch-up voltage operation and wide latch window was studied using numerical simulations. Various parameters were optimized, including the doping concentrations of the emitter, base and collector as well as the geometric dimensions of the base length and base diameter. An optimization methodology that considers the physical influences of each parameter mentioned above can provide insightful guidance for actual device fabrication. A pure silicon biristor with both low operating voltage and a wide sensing window, without capacitor, gate and gate insulator, can be applied for post-DRAM technology.

中文翻译:

一种优化硅双电阻器低工作电压的策略

使用数值模拟研究了具有低闩锁电压操作和宽闩锁窗口的纯硅基双电阻器。优化了各种参数,包括发射极、基极和集电极的掺杂浓度以及基极长度和基极直径的几何尺寸。考虑上述每个参数的物理影响的优化方法可以为实际器件制造提供深刻的指导。具有低工作电压和宽传感窗口的纯硅双电阻器,无需电容器、栅极和栅极绝缘体,可应用于后 DRAM 技术。
更新日期:2020-01-01
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