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A novel input data transition aware dynamic voltage scaling based low power MAC architecture for DSP applications
Design Automation for Embedded Systems ( IF 1.4 ) Pub Date : 2017-07-11 , DOI: 10.1007/s10617-017-9186-8
D. Haripriya , C. Govindaraju , M. Sumathi

A novel input transition aware dynamic voltage scaling based low power 8 bit Multiplier–Accumulator (MAC) architecture for Digital Signal Processing (DSP) has been presented in this paper. MAC is one of the main modules used in the various DSP applications like filtering, convolution and so on. The proposed input data transition aware dynamic voltage scaling is very effective method to minimize the dynamic power consumption without degrading the performance of the system. The input data transition detector circuit in the proposed low power MAC detects the transition and applies the dynamic voltage scaling adaptively so that the dynamic power is reduced to greater extent. The dynamic power consumed by the conventional MAC is 662.59 mW when all inputs are switching and it is only 475.75 mW for the proposed MAC with the same conditions. The proposed MAC consumes 28.19% less power than the conventional MAC for the same set of inputs and simulation environment.

中文翻译:

基于DSP的新型输入数据转换感知动态电压缩放低功耗MAC架构

本文提出了一种新颖的基于输入过渡感知的动态电压缩放的低功耗8位乘法器-累加器(MAC)体系结构,用于数字信号处理(DSP)。MAC是在各种DSP应用程序(如过滤,卷积等)中使用的主要模块之一。提出的输入数据转换感知动态电压缩放是一种非常有效的方法,可以在不降低系统性能的情况下最大程度地降低动态功耗。所提出的低功率MAC中的输入数据转变检测器电路检测到转变并自适应地施加动态电压缩放,从而更大程度地降低了动态功率。当所有输入都切换时,常规MAC消耗的动态功率为662.59 mW,而在相同条件下建议的MAC仅动态消耗475.75 mW。
更新日期:2017-07-11
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