Unlike conventional CMOS circuits, nano-crossbar arrays have considerably high defect rates. Multiple-type defects randomly occur both on crosspoint switches and wires that substantially complicates the design phase of the circuits with an elimination of systematic design choices. In order to overcome this problem, a logic mapping methodology is presented in this paper. A fast heuristic algorithm using pre-mapping logic morphing, defect oriented adaptive sorting, matching with Hadamard multiplication, and backtracking is introduced. The proposed algorithm covers both crosspoint defects including stuck-open and stuck-closed types and wire defects including bridging and broken types. Effects of stuck-closed defects, mostly disregarded in the literature, are studied in depth. In simulations, an industrial benchmark suit is used for obtaining runtime and success rate values of the proposed algorithm in comparison with those of the existing algorithms in the literature. A relative accuracy evaluation is also given in comparison with exact mapping techniques. Finally, the steps of the algorithm that are based on pre-mapping and heuristic matching techniques, are separately justified with experimental results.

中文翻译：

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可重构纳米交叉阵列中多类型缺陷容限的快速逻辑映射算法

与传统的 CMOS 电路不同，纳米交叉阵列具有相当高的缺陷率。多类型缺陷随机出现在交叉点开关和导线上，这使电路的设计阶段大大复杂化，同时消除了系统设计选择。为了克服这个问题，本文提出了一种逻辑映射方法。介绍了一种使用预映射逻辑变形、面向缺陷的自适应排序、与Hadamard乘法匹配和回溯的快速启发式算法。所提出的算法涵盖了包括卡开和卡合类型的交叉点缺陷和包括桥接和断裂类型的线缺陷。深入研究了文献中大多忽略的卡住缺陷的影响。在模拟中，与文献中的现有算法相比，工业基准套件用于获得所提出算法的运行时间和成功率值。与精确映射技术相比，还给出了相对精度评估。最后，基于预映射和启发式匹配技术的算法步骤分别用实验结果证明。