The current trend for domain-specific architectures (DSAs) has led to renewed interest in research test chips to demonstrate new specialized hardware. Tape-outs also offer huge pedagogical value garnered from real hands-on exposure to the whole system stack. However, successful tape-outs demand hard-earned experience, and the design process is time consuming and fraught with challenges. Therefore, custom chips have remained the preserve of a small number of research groups, typically focused on circuit design research. This paper describes the CHIPKIT framework. We describe a reusable SoC subsystem which provides basic IO, an on-chip programmable host, memory and peripherals. This subsystem can be readily extended with new IP blocks to generate custom test chips. We also present an agile RTL development flow, including a code generation tool calledVGEN. Finally, we outline best practices for full-chip validation across the entire design cycle.

中文翻译：

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CHIPKIT：用于快速测试芯片开发的敏捷、可重用的开源框架

特定领域架构 (DSA) 的当前趋势已导致人们重新对研究测试芯片以展示新的专用硬件产生兴趣。Tape-outs 还提供了巨大的教学价值，这些价值是从对整个系统堆栈的真正动手接触中获得的。然而，成功的流片需要来之不易的经验，设计过程既耗时又充满挑战。因此，定制芯片仍然是少数研究小组的专利，通常专注于电路设计研究。本文介绍了 CHIPKIT 框架。我们描述了一个可重用的 SoC 子系统，它提供基本 IO、片上可编程主机、内存和外围设备。该子系统可以很容易地使用新的 IP 模块进行扩展，以生成定制的测试芯片。我们还介绍了敏捷 RTL 开发流程，包括一个名为 VGEN 的代码生成工具。最后，我们概述了整个设计周期中全芯片验证的最佳实践。