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Hardware Implementation of Neural Self-Interference Cancellation
arXiv - CS - Hardware Architecture Pub Date : 2020-01-13 , DOI: arxiv-2001.04543
Yann Kurzo, Andreas Toftegaard Kristensen, Andreas Burg, and Alexios Balatsoukas-Stimming

In-band full-duplex systems can transmit and receive information simultaneously on the same frequency band. However, due to the strong self-interference caused by the transmitter to its own receiver, the use of non-linear digital self-interference cancellation is essential. In this work, we describe a hardware architecture for a neural network-based non-linear self-interference (SI) canceller and we compare it with our own hardware implementation of a conventional polynomial based SI canceller. In particular, we present implementation results for a shallow and a deep neural network SI canceller as well as for a polynomial SI canceller. Our results show that the deep neural network canceller achieves a hardware efficiency of up to $312.8$ Msamples/s/mm$^2$ and an energy efficiency of up to $0.9$ nJ/sample, which is $2.1\times$ and $2\times$ better than the polynomial SI canceller, respectively. These results show that NN-based methods applied to communications are not only useful from a performance perspective, but can also be a very effective means to reduce the implementation complexity.

中文翻译:

神经自干扰消除的硬件实现

带内全双工系统可以在同一频段上同时发送和接收信息。但是,由于发射机对自身接收机造成的强自干扰,使用非线性数字自干扰消除是必不可少的。在这项工作中,我们描述了基于神经网络的非线性自干扰 (SI) 消除器的硬件架构,并将其与我们自己的基于多项式的传统 SI 消除器的硬件实现进行了比较。特别是,我们展示了浅层和深层神经网络 SI 消除器以及多项式 SI 消除器的实现结果。我们的结果表明,深度神经网络消除器实现了高达 $312.8$ Msamples/s/mm$^2$ 的硬件效率和高达 $0.9$ nJ/sample 的能量效率,即 $2。分别比多项式 SI 消除器好 1\times$ 和 $2\times$。这些结果表明,应用于通信的基于 NN 的方法不仅从性能角度来看是有用的,而且也是降低实现复杂性的非常有效的手段。
更新日期:2020-05-08
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