This letter presents a three-stage differential power amplifier (PA) with an adaptive built-in linearizer (ABL) that achieves an enhanced AM–AM linearity. Series inductors are introduced at cascode internodes to improve the output matching conditions of the cascode amplifiers and stabilize a high-gain PA operation. Capacitors at the gate in the common-gate amplifiers at the power stage are used to achieve high differential gain by reducing RF coupling at the virtual ground and equalizing the drain-source voltage swings. Broad-side coupled transmission line transformers are used for all matching networks. It has 25.5-dB peak power gain and 12.2-dBm saturation output power at 110 GHz with 3-dB bandwidth of 92.5 and 117 GHz. It has a core chip size of 0.76 mm2 and a peak power-added efficiency (PAE) of 8.5%.

中文翻译：

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具有自适应内置线性化器的 25.5dB 峰值增益 $F$ 波段功率放大器

这封信展示了一个带有自适应内置线性化器 (ABL) 的三级差分功率放大器 (PA)，可实现增强的 AM-AM 线性度。在共源共栅节点间引入串联电感以改善共源共栅放大器的输出匹配条件并稳定高增益 PA 操作。功率级共栅极放大器栅极处的电容器用于通过减少虚拟接地处的 RF 耦合和均衡漏源电压摆幅来实现高差分增益。宽边耦合传输线变压器用于所有匹配网络。它在 110 GHz 具有 25.5-dB 峰值功率增益和 12.2-dBm 饱和输出功率，3-dB 带宽为 92.5 和 117 GHz。它的核心芯片尺寸为 0.76 mm2，峰值功率附加效率 (PAE) 为 8.5%。