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Design Rules for Memories Based on Graphene Ferroelectric Field-Effect Transistors
ACS Applied Electronic Materials ( IF 4.3 ) Pub Date : 2019-12-11 , DOI: 10.1021/acsaelm.9b00532
Morteza Hassanpour Amiri 1 , Jonas Heidler 1 , Klaus Müllen 1 , Kamal Asadi 1
Affiliation  

Despite the great progress of ferroelectric gated field-effect transistors (Fe-FETs) based on graphene and other 2D materials, a device model that accurately describes the hysteretic transfer characteristics and provides guidelines on performance enhancement of the Fe-FET is still lacking. Here, we present an experimentally validated analytical model that couples charge displacement of the ferroelectric layer with the charge transport in the graphene layer. The model describes hysteretic transfer characteristics of the Fe-FETs with good accuracy and predicts that the on/off ratio of the graphene Fe-FET is determined by Dirac bias and the charge carrier mobility. The model predicts the unsuitability of an ideal graphene layer for memory application and outlines the conditions to achieve the best memory performance in graphene Fe-FETs. The model is generic and can be as well used for Fe-FETs based on other 2D materials.

中文翻译:

基于石墨烯铁电场效应晶体管的存储器设计规则

尽管基于石墨烯和其他2D材料的铁电门控场效应晶体管(Fe-FET)取得了长足进步,但仍然缺少一种能够准确描述磁滞传递特性并提供有关Fe-FET性能增强的指南的器件模型。在这里,我们提出了一个经过实验验证的分析模型,该模型将铁电层的电荷位移与石墨烯层中的电荷传输耦合在一起。该模型以高精确度描述了Fe-FET的磁滞传递特性,并预测了石墨烯Fe-FET的开/关比由Dirac偏压和电荷载流子迁移率决定。该模型预测了理想的石墨烯层不适合用于存储器应用,并概述了在石墨烯Fe-FET中实现最佳存储器性能的条件。
更新日期:2020-01-06
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