A wideband triple-stacked CMOS distributed power amplifier (DPA) is implemented using a commercial 65-nm CMOS process. To enhance the output power, a triple-stacked field effect transistor (FET) is used as a gain cell in the DPA. Double inductive peaking, in which inductors are inserted at each gate and each interstage of the gain cells, is used to enhance the gain bandwidth. By analyzing the trans-conductance characteristics in the triple-stacked gain cell, interstage inductive peaking (IIP) is used to boost the gain in the mid-band frequency, and gate-inductive peaking (GIP) is used to extend the gain bandwidth in the high-edge frequency. The proposed double inductive peaking ideally enables the gain bandwidth of triple-stacked DPAs to increase from 22 to 44 GHz. The proposed DPA obtains a measured power gain of 11–15.7 dB and a measured output power of 12.8–21.7 dBm from dc to 38 GHz.

中文翻译：

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使用双电感峰值的宽带三重堆叠 CMOS 分布式功率放大器

宽带三重堆叠 CMOS 分布式功率放大器 (DPA) 是使用商用 65 纳米 CMOS 工艺实现的。为了提高输出功率，三重堆叠场效应晶体管 (FET) 用作 DPA 中的增益单元。双电感峰值，其中电感器插入增益单元的每个栅极和每个级间，用于提高增益带宽。通过分析三重堆叠增益单元的跨导特性，级间电感峰化 (IIP) 用于提升中频增益，栅极电感峰化 (GIP) 用于扩展增益带宽高边频率。所提出的双电感峰值理想地使三重堆叠 DPA 的增益带宽从 22 GHz 增加到 44 GHz。建议的 DPA 获得了 11-15 的测量功率增益。