The NEURON simulator has been developed over the past three decades and is widely used by neuroscientists to model the electrical activity of neuronal networks. Large network simulation projects using NEURON have supercomputer allocations that individually measure in the millions of core hours. Supercomputer centers are transitioning to next generation architectures and the work accomplished per core hour for these simulations could be improved by an order of magnitude if NEURON was able to better utilize those new hardware capabilities. In order to adapt NEURON to evolving computer architectures, the compute engine of the NEURON simulator has been extracted and has been optimized as a library called CoreNEURON. This paper presents the design, implementation, and optimizations of CoreNEURON. We describe how CoreNEURON can be used as a library with NEURON and then compare performance of different network models on multiple architectures including IBM BlueGene/Q, Intel Skylake, Intel MIC and NVIDIA GPU. We show how CoreNEURON can simulate existing NEURON network models with 4–7x less memory usage and 2–7x less execution time while maintaining binary result compatibility with NEURON.

中文翻译：

---

CoreNEURON：神经模拟器的优化计算引擎

神经模拟器已经发展了过去三十年，被神经科学家广泛用于模拟神经网络的电活动。使用 NEURON 的大型网络模拟项目拥有超级计算机分配，可单独测量数百万个核心小时。超级计算机中心正在过渡到下一代架构，如果 NEURON 能够更好地利用这些新硬件功能，这些模拟的每个核心小时完成的工作量可能会提高一个数量级。为了使 NEURON 适应不断发展的计算机架构，NEURON 模拟器的计算引擎已被提取并优化为一个名为 CoreNEURON 的库。本文介绍了 CoreNEURON 的设计、实现和优化。我们描述了如何将 CoreNEURON 用作 NEURON 的库，然后比较不同网络模型在多种架构（包括 IBM BlueGene/Q、Intel Skylake、Intel MIC 和 NVIDIA GPU）上的性能。我们展示了 CoreNEURON 如何模拟现有的 NEURON 网络模型，内存使用量减少 4-7 倍，执行时间减少 2-7 倍，同时保持二进制结果与 NEURON 的兼容性。