The potential of strained DOTFET technology is demonstrated. This technology uses a SiGe island as a stressor for a Si capping layer, into which the transistor channel is integrated. The structure information of fabricated samples is extracted from atomic force microscopy (AFM) measurements. Strain on the upper surface of a 30 nm thick Si layer is in the range of 0.7%, as supported by finite element calculations. The Ge content in the SiGe island is 30% on average, showing an increase towards the top of the island. Based on the extracted structure information, three-dimensional strain profiles are calculated and device simulations are performed. Up to 15% enhancement of the NMOS saturation current is predicted.

展示了应变 DOTFET 技术的潜力。该技术使用 SiGe 岛作为 Si 覆盖层的应力源，其中集成了晶体管沟道。制造样品的结构信息是从原子力显微镜 (AFM) 测量中提取的。有限元计算支持 30 nm 厚 Si 层上表面的应变在 0.7% 的范围内。SiGe岛中Ge含量平均为30%，向岛顶呈增加趋势。根据提取的结构信息，计算三维应变分布并进行器件模拟。预计 NMOS 饱和电流将增加 15%。