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A semi-floating gate memory based on van der Waals heterostructures for quasi-non-volatile applications
Nature Nanotechnology ( IF 38.1 ) Pub Date : 2018-04-09 , DOI: 10.1038/s41565-018-0102-6
Chunsen Liu , Xiao Yan , Xiongfei Song , Shijin Ding , David Wei Zhang , Peng Zhou

As conventional circuits based on field-effect transistors are approaching their physical limits due to quantum phenomena, semi-floating gate transistors have emerged as an alternative ultrafast and silicon-compatible technology. Here, we show a quasi-non-volatile memory featuring a semi-floating gate architecture with band-engineered van der Waals heterostructures. This two-dimensional semi-floating gate memory demonstrates 156 times longer refresh time with respect to that of dynamic random access memory and ultrahigh-speed writing operations on nanosecond timescales. The semi-floating gate architecture greatly enhances the writing operation performance and is approximately 106 times faster than other memories based on two-dimensional materials. The demonstrated characteristics suggest that the quasi-non-volatile memory has the potential to bridge the gap between volatile and non-volatile memory technologies and decrease the power consumption required for frequent refresh operations, enabling a high-speed and low-power random access memory.



中文翻译:

基于范德华异质结构的半浮栅存储器,用于准非易失性应用

由于基于量子效应的基于场效应晶体管的常规电路正接近其物理极限,半浮栅晶体管已成为一种替代性的超快且与硅兼容的技术。在这里,我们展示了一种准非易失性存储器,具有半浮动门架构,具有能带设计的范德华(Van der Waals)异质结构。该二维半浮栅存储器的刷新时间比动态随机存取存储器和纳秒级的超高速写入操作的刷新时间长156倍。半浮栅结构大大提高了写入操作性能,大约为10 6比其他基于二维材料的存储器快1倍。所展示的特性表明,准非易失性存储器有潜力弥合易失性和非易失性存储器技术之间的差距,并减少频繁刷新操作所需的功耗,从而实现高速和低功耗的随机存取存储器。

更新日期:2018-04-10
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