Doped semiconductors are the most important building elements for modern electronic devices¹. In silicon-based integrated circuits, facile and controllable fabrication and integration of these materials can be realized without introducing a high-resistance interface^2,3. Besides, the emergence of two-dimensional (2D) materials enables the realization of atomically thin integrated circuits^4,5,6,7,8,9. However, the 2D nature of these materials precludes the use of traditional ion implantation techniques for carrier doping and further hinders device development¹⁰. Here, we demonstrate a solvent-based intercalation method to achieve p-type, n-type and degenerately doped semiconductors in the same parent material at the atomically thin limit. In contrast to naturally grown n-type S-vacancy SnS₂, Cu intercalated bilayer SnS₂ obtained by this technique displays a hole field-effect mobility of ~40 cm² V⁻¹s⁻¹, and the obtained Co-SnS₂ exhibits a metal-like behaviour with sheet resistance comparable to that of few-layer graphene⁵. Combining this intercalation technique with lithography, an atomically seamless p–n–metal junction could be further realized with precise size and spatial control, which makes in-plane heterostructures practically applicable for integrated devices and other 2D materials. Therefore, the presented intercalation method can open a new avenue connecting the previously disparate worlds of integrated circuits and atomically thin materials.

掺杂半导体是现代电子设备¹最重要的建筑元素。在基于硅的集成电路中，无需引入高电阻接口^2,3即可实现这些材料的便捷，可控的制造和集成。此外，二维（2D）材料的出现使原子薄的集成电路^4,5,6,7,8,9的实现成为可能。但是，这些材料的2D性质无法使用传统的离子注入技术进行载流子掺杂，并进一步阻碍了器件的开发¹⁰。在这里，我们展示了一种基于溶剂的插层方法，可在同一母体材料中以原子薄的极限实现p型，n型和简并掺杂的半导体。与自然生长的n型S-空位SnS _2相比，通过该技术获得的Cu插层双层SnS ₂显示出〜40cm ²  V ^-1 s ^-1的空穴场效应迁移率，并且所获得的Co-SnS ₂显示出具有类似于几层石墨烯^5的薄层电阻的类似金属的行为。将这种嵌入技术与光刻技术相结合，可以通过精确的尺寸和空间控制进一步实现原子无缝的p–n–金属结，这使得面内异质结构实际上适用于集成设备和其他2D材料。因此，提出的插层方法可以开辟一条新的途径，将先前不同的集成电路世界与原子薄材料连接起来。