Ferroelectric tunnel junctions are promising candidates for the realization of energy-efficient digital memories and analog memcomputing devices. In this work, we investigate the impact of a semiconducting layer in series to the junction on the sign of electroresistance. To this scope, we compare tunnel junctions fabricated out of Pt/BaTiO3/La1/3Sr2/3MnO3 (LSMO) and Pt/BaTiO3/Nb:SrTiO3 (Nb:STO) heterostructures, displaying an opposite sign of the electroresistance. By capacitance-voltage profiling, we observe a behavior typical of Metal-Oxide-Semiconductor tunnel devices in both cases but compatible with the opposite sign of charge carriers in the semiconducting layer. While Nb:STO displays the expected n-type semiconducting character, metallic LSMO develops an interfacial p-type semiconducting layer. The different types of carriers at the semiconducting interfaces and the modulation of the depleted region by the ferroelectric charge have a deep impact on electroresistance, possibly accounting for the different sign observed in the two systems.Ferroelectric tunnel junctions are promising candidates for the realization of energy-efficient digital memories and analog memcomputing devices. In this work, we investigate the impact of a semiconducting layer in series to the junction on the sign of electroresistance. To this scope, we compare tunnel junctions fabricated out of Pt/BaTiO3/La1/3Sr2/3MnO3 (LSMO) and Pt/BaTiO3/Nb:SrTiO3 (Nb:STO) heterostructures, displaying an opposite sign of the electroresistance. By capacitance-voltage profiling, we observe a behavior typical of Metal-Oxide-Semiconductor tunnel devices in both cases but compatible with the opposite sign of charge carriers in the semiconducting layer. While Nb:STO displays the expected n-type semiconducting character, metallic LSMO develops an interfacial p-type semiconducting layer. The different types of carriers at the semiconducting interfaces and the modulation of the depleted region by the ferroelectric charge have a deep impact on electroresistance, possibly accounting for the dif...

中文翻译：

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半导体电极对铁电隧道结电阻的影响

铁电隧道结是实现节能数字存储器和模拟记忆计算设备的有希望的候选者。在这项工作中，我们研究了与结串联的半导体层对电阻符号的影响。在这个范围内，我们比较了由 Pt/BaTiO3/La1/3Sr2/3MnO3 (LSMO) 和 Pt/BaTiO3/Nb:SrTiO3 (Nb:STO) 异质结构制成的隧道结，显示出相反的电阻符号。通过电容-电压分析，我们观察到两种情况下金属-氧化物-半导体隧道器件的典型行为，但与半导体层中电荷载流子的相反符号兼容。虽然 Nb:STO 显示出预期的 n 型半导体特性，但金属 LSMO 会形成界面 p 型半导体层。半导体界面上不同类型的载流子和铁电荷对耗尽区的调制对电阻有很深的影响，可能是在两个系统中观察到的不同符号的原因。铁电隧道结是实现能量的有希望的候选者- 高效的数字存储器和模拟内存计算设备。在这项工作中，我们研究了与结串联的半导体层对电阻符号的影响。在这个范围内，我们比较了由 Pt/BaTiO3/La1/3Sr2/3MnO3 (LSMO) 和 Pt/BaTiO3/Nb:SrTiO3 (Nb:STO) 异质结构制成的隧道结，显示出相反的电阻符号。通过电容电压分析，我们在两种情况下都观察到金属-氧化物-半导体隧道器件的典型行为，但与半导体层中电荷载流子的相反符号兼容。虽然 Nb:STO 显示出预期的 n 型半导体特性，但金属 LSMO 会形成界面 p 型半导体层。半导体界面上不同类型的载流子和铁电荷对耗尽区的调制对电阻有很深的影响，可能是造成不同...