Abstract In order to suppress dislocation generation, we develop a “three-step growth” method to heteroepitaxy low dislocation density germanium (Ge) layers on silicon with the MBE process. The method is composed of 3 growth steps: low temperature (LT) seed layer, LT-HT intermediate layer as well as high temperature (HT) epilayer, successively. Threading dislocation density (TDD) of epitaxial Ge layers is measured as low as 1.4 × 106 cm−2 by optimizing the growth parameters. The results of Raman spectrum showed that the internal strain of heteroepitaxial Ge layers is tensile and homogeneous. During the growth of LT-HT intermediate layer, TDD reduction can be obtained by lowering the temperature ramping rate, and high rate deposition maintains smooth surface morphology in Ge epilayer. A mechanism based on thermodynamics is used to explain the TDD and surface morphological dependence on temperature ramping rate and deposition rate. Furthermore, we demonstrate that the Ge layer obtained can provide an excellent platform for III–V materials integrated on Si.

中文翻译：

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锗外延层穿透位错密度降低的异质外延生长优化

摘要 为了抑制位错的产生，我们开发了一种“三步生长”方法，通过 MBE 工艺在硅上异质外延低位错密度锗 (Ge) 层。该方法由 3 个生长步骤组成：依次是低温 (LT) 种子层、LT-HT 中间层和高温 (HT) 外延层。通过优化生长参数，测得的外延 Ge 层的穿透位错密度 (TDD) 低至 1.4 × 106 cm-2。拉曼光谱结果表明异质外延Ge层的内部应变为拉伸且均匀的。在LT-HT中间层的生长过程中，可以通过降低温度斜坡速率来减少TDD，并且高速沉积可以保持Ge外延层的光滑表面形态。基于热力学的机制用于解释 TDD 和表面形态对温度上升速率和沉积速率的依赖性。此外，我们证明所获得的 Ge 层可以为集成在 Si 上的 III-V 族材料提供一个极好的平台。