当前位置: X-MOL 学术IEEE Trans. Ind. Electron. › 论文详情
Our official English website, www.x-mol.net, welcomes your feedback! (Note: you will need to create a separate account there.)
A Symmetrical Cascaded Compact-Module Multilevel Inverter (CCM-MLI) With Pulsewidth Modulation
IEEE Transactions on Industrial Electronics ( IF 7.5 ) Pub Date : 2017-11-28 , DOI: 10.1109/tie.2017.2772209
Sze Sing Lee , Michail Sidorov , Nik Rumzi Nik Idris , Yeh En Heng

Cascaded H-bridge (CHB) multilevel inverters (MLIs) have been widely used for power electronics systems. While high-voltage blocking across power switches is not a constraint for low voltage applications, the research trend has been oriented to the design of more compact module topologies as an alternative for CHB. Despite the generation of more voltage levels with reduced switch count, the existing module topologies in recent literature take no account of the freewheeling current path during dead-time, thus, inducing multistep jumps in voltage levels and giving rise to undesirable voltage spikes. Addressing this concern, this paper proposes two symmetrical compact-module topologies for cascaded MLI, where freewheeling current path during dead-time is provided for smooth transition between voltage levels to prevent voltage spikes. The proposed 7-level and 13-level compact-modules demonstrated low number of conducting switches for all voltage levels. Comprehensive analysis and comparison with the latest module topologies are conducted. To validate the operation of the proposed compact-module topologies, simulation and experimental results are presented.

中文翻译:


具有脉宽调制功能的对称级联紧凑模块多电平逆变器 (CCM-MLI)



级联 H 桥 (CHB) 多电平逆变器 (MLI) 已广泛用于电力电子系统。虽然电源开关上的高压阻断并不是低压应用的限制,但研究趋势已转向设计更紧凑的模块拓扑作为 CHB 的替代方案。尽管通过减少开关数量产生了更多的电压电平,但最近文献中的现有模块拓扑没有考虑死区时间期间的续流电流路径,因此,引起电压电平的多步跳跃并引起不期望的电压尖峰。为了解决这个问题,本文提出了两种用于级联 MLI 的对称紧凑模块拓扑,其中在死区时间期间提供续流电流路径,以实现电压电平之间的平滑过渡,以防止电压尖峰。所提出的 7 级和 13 级紧凑型模块展示了所有电压等级的导电开关数量较少。与最新的模块拓扑进行了全面的分析和比较。为了验证所提出的紧凑模块拓扑的运行,提出了仿真和实验结果。
更新日期:2017-11-28
down
wechat
bug