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Memristive Logic‐in‐Memory Integrated Circuits for Energy‐Efficient Flexible Electronics
Advanced Functional Materials ( IF 18.5 ) Pub Date : 2017-11-23 , DOI: 10.1002/adfm.201704725 Byung Chul Jang 1 , Yunyong Nam 2 , Beom Jun Koo 1 , Junhwan Choi 3 , Sung Gap Im 3 , Sang-Hee Ko Park 2 , Sung-Yool Choi 1
Advanced Functional Materials ( IF 18.5 ) Pub Date : 2017-11-23 , DOI: 10.1002/adfm.201704725 Byung Chul Jang 1 , Yunyong Nam 2 , Beom Jun Koo 1 , Junhwan Choi 3 , Sung Gap Im 3 , Sang-Hee Ko Park 2 , Sung-Yool Choi 1
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A memristive nonvolatile logic‐in‐memory circuit can provide a novel energy‐efficient computing architecture for battery‐powered flexible electronics. However, the cell‐to‐cell interference existing in the memristor crossbar array impedes both the reading process and parallel computing. Here, it is demonstrated that integration of an amorphous In‐Zn‐Sn‐O (a‐IZTO) semiconductor‐based selector (1S) device and a poly(1,3,5‐trivinyl‐1,3,5‐trimethyl cyclotrisiloxane) (pV3D3)‐based memristor (1M) on a flexible substrate can overcome these problems. The developed a‐IZTO‐based selector device, having a Pd/a‐IZTO/Pd structure, exhibits nonlinear current–voltage (I–V) characteristics with outstanding stability against electrical and mechanical stresses. Its underlying conduction mechanism is systematically determined via the temperature‐dependent I–V characteristics. The flexible one‐selector−one‐memristor (1S–1M) array exhibits reliable electrical characteristics and significant leakage current suppression. Furthermore, single‐instruction multiple‐data (SIMD), the foundation of parallel computing, is successfully implemented by performing NOT and NOR gates over multiple rows within the 1S–1M array. The results presented here will pave the way for development of a flexible nonvolatile logic‐in‐memory circuit for energy‐efficient flexible electronics.
中文翻译：
高能效柔性电子的忆阻存储器逻辑集成电路
忆阻非易失性存储器逻辑电路可以为电池供电的柔性电子产品提供新颖的节能计算架构。但是，忆阻器交叉开关阵列中存在的单元间干扰会阻碍读取过程和并行计算。在此证明了非晶In-Zn-Sn-O（a-IZTO）半导体选择器（1S）器件与聚（1,3,5-三乙烯基-1,3,5-三甲基环三硅氧烷）的集成）（pV3D3）的忆阻器（1M）可以解决这些问题。已开发的基于IZTO的选择器器件具有Pd / aIZTO / Pd结构，具有非线性电流-电压（I – V）具有出色的抗电和机械应力稳定性的特性。其潜在的传导机制是通过取决于温度的I – V特性来系统地确定的。灵活的单选一忆阻（1S-1M）阵列具有可靠的电气特性和显着的泄漏电流抑制能力。此外，单指令多数据（SIMD）是并行计算的基础，它通过在1S-1M阵列中的多行上执行“非”或“或非”门而成功实现。此处介绍的结果将为开发高能效的柔性电子产品的柔性非易失性存储器逻辑电路铺平道路。
更新日期：2017-11-23
中文翻译：
高能效柔性电子的忆阻存储器逻辑集成电路
忆阻非易失性存储器逻辑电路可以为电池供电的柔性电子产品提供新颖的节能计算架构。但是，忆阻器交叉开关阵列中存在的单元间干扰会阻碍读取过程和并行计算。在此证明了非晶In-Zn-Sn-O（a-IZTO）半导体选择器（1S）器件与聚（1,3,5-三乙烯基-1,3,5-三甲基环三硅氧烷）的集成）（pV3D3）的忆阻器（1M）可以解决这些问题。已开发的基于IZTO的选择器器件具有Pd / aIZTO / Pd结构，具有非线性电流-电压（I – V）具有出色的抗电和机械应力稳定性的特性。其潜在的传导机制是通过取决于温度的I – V特性来系统地确定的。灵活的单选一忆阻（1S-1M）阵列具有可靠的电气特性和显着的泄漏电流抑制能力。此外，单指令多数据（SIMD）是并行计算的基础，它通过在1S-1M阵列中的多行上执行“非”或“或非”门而成功实现。此处介绍的结果将为开发高能效的柔性电子产品的柔性非易失性存储器逻辑电路铺平道路。
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