In recent years, there has been a significant advancement in memristor-based neural networks, positioning them as a pivotal processing-in-memory deployment architecture for a wide array of deep learning applications. Within this realm of progress, the emerging parallel analog memristive platforms are prominent for their ability to generate multiple feature maps in a single processing cycle. However, a notable limitation is that they are specifically tailored for neural networks with fixed structures. As an orthogonal direction, recent research reveals that neural architecture should be specialized for tasks and deployment platforms. Building upon this, the neural architecture search (NAS) methods effectively explore promising architectures in a large design space. However, these NAS-based architectures are generally heterogeneous and diversified, making it challenging for deployment on current single-prototype, customized, parallel analog memristive hardware circuits. Therefore, investigating memristive analog deployment that overrides the full search space is a promising and challenging problem. Inspired by this, and beginning with the search space, we study the memristive hardware design of primitive operations and propose the memristive all-inclusive hypernetwork that covers network architectures. Our computational simulation results on 3 representative architectures (, , ) show that our memristive all-inclusive hypernetwork achieves promising results on the CIFAR10 dataset (89.2 of with 8-bit quantization precision), and is compatible with all architectures in the full-space. The hardware performance simulation indicates that the memristive all-inclusive hypernetwork costs slightly more resource consumption (nearly the same in power, increase in , in ) relative to the individual deployment, which is reasonable and may reach a tolerable trade-off deployment scheme for industrial scenarios.

中文翻译：

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用于全搜索空间架构并行模拟部署的忆阻全包超网络

近年来，基于忆阻器的神经网络取得了重大进展，将其定位为各种深度学习应用的关键内存处理部署架构。在这一进步领域中，新兴的并行模拟忆阻平台因其在单个处理周期中生成多个特征图的能力而引人注目。然而，一个显着的限制是它们是专门为具有固定结构的神经网络量身定制的。作为一个正交方向，最近的研究表明神经架构应该专门针对任务和部署平台。在此基础上，神经架构搜索（NAS）方法有效地探索了大设计空间中有前途的架构。然而，这些基于 NAS 的架构通常是异构和多样化的，这使得在当前的单一原型、定制、并行模拟忆阻硬件电路上部署具有挑战性。因此，研究覆盖整个搜索空间的忆阻模拟部署是一个有前途且具有挑战性的问题。受此启发，我们从搜索空间入手，研究了原始操作的忆阻硬件设计，并提出了覆盖网络架构的忆阻全包超网络。我们对 3 种代表性架构（、、、）的计算模拟结果表明，我们的忆阻全包超网络在 CIFAR10 数据集（8 位量化精度为 89.2）上取得了可喜的结果，并且与全空间中的所有架构兼容。硬件性能仿真表明，忆阻全包超网络相对于单独部署，资源消耗略高（功耗几乎相同，增加 , in ），这是合理的，可以达到工业界可容忍的权衡部署方案。场景。