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High-threshold and low-overhead fault-tolerant quantum memory
Nature ( IF 64.8 ) Pub Date : 2024-03-27 , DOI: 10.1038/s41586-024-07107-7
Sergey Bravyi , Andrew W. Cross , Jay M. Gambetta , Dmitri Maslov , Patrick Rall , Theodore J. Yoder

The accumulation of physical errors1,2,3 prevents the execution of large-scale algorithms in current quantum computers. Quantum error correction4 promises a solution by encoding k logical qubits onto a larger number n of physical qubits, such that the physical errors are suppressed enough to allow running a desired computation with tolerable fidelity. Quantum error correction becomes practically realizable once the physical error rate is below a threshold value that depends on the choice of quantum code, syndrome measurement circuit and decoding algorithm5. We present an end-to-end quantum error correction protocol that implements fault-tolerant memory on the basis of a family of low-density parity-check codes6. Our approach achieves an error threshold of 0.7% for the standard circuit-based noise model, on par with the surface code7,8,9,10 that for 20 years was the leading code in terms of error threshold. The syndrome measurement cycle for a length-n code in our family requires n ancillary qubits and a depth-8 circuit with CNOT gates, qubit initializations and measurements. The required qubit connectivity is a degree-6 graph composed of two edge-disjoint planar subgraphs. In particular, we show that 12 logical qubits can be preserved for nearly 1 million syndrome cycles using 288 physical qubits in total, assuming the physical error rate of 0.1%, whereas the surface code would require nearly 3,000 physical qubits to achieve said performance. Our findings bring demonstrations of a low-overhead fault-tolerant quantum memory within the reach of near-term quantum processors.



中文翻译:

高阈值、低开销的容错量子存储器

物理错误1、2、3的累积阻碍了当前量子计算机中大规模算法的执行。量子纠错4提出了一种解决方案,将k 个逻辑量子位编码到数量较多的n 个物理量子位上,从而充分抑制物理错误,从而允许以可容忍的保真度运行所需的计算。一旦物理错误率低于阈值,量子纠错实际上就可以实现,该阈值取决于量子代码、校正子测量电路和解码算法的选择5。我们提出了一种端到端的量子纠错协议,该协议基于一系列低密度奇偶校验码6来实现容错存储器。我们的方法为基于标准电路的噪声模型实现了 0.7% 的错误阈值,与表面代码 7、8、9、10 相当,表面代码7、8、9、10是 20 年来在错误阈值方面领先的代码。我们系列中长度为n 的代码的校正子测量周期需要n 个辅助量子位和一个带有 CNOT 门、量子位初始化和测量的深度 8 电路。所需的量子位连通性是由两个边不相交的平面子图组成的 6 度图。特别是,我们表明,假设物理错误率为 0.1%,总共使用 288 个物理量子位,可以为近 100 万个校正子周期保留 12 个逻辑量子位,而表面代码需要近 3,000 个物理量子位才能实现上述性能。我们的研究结果证明了近期量子处理器可以实现的低开销容错量子存储器。

更新日期:2024-03-28
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