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Vertical InAs/InGaAs Heterostructure Metal–Oxide–Semiconductor Field-Effect Transistors on Si
Nano Letters ( IF 10.8 ) Pub Date : 2017-09-14 00:00:00 , DOI: 10.1021/acs.nanolett.7b02251
Olli-Pekka Kilpi 1 , Johannes Svensson 1 , Jun Wu 2 , Axel R. Persson 3, 4 , Reine Wallenberg 3, 4 , Erik Lind 1 , Lars-Erik Wernersson 1
Affiliation  

III–V compound semiconductors offer a path to continue Moore’s law due to their excellent electron transport properties. One major challenge, integrating III–V’s on Si, can be addressed by using vapor–liquid–solid grown vertical nanowires. InAs is an attractive material due to its superior mobility, although InAs metal–oxide–semiconductor field-effect transistors (MOSFETs) typically suffer from band-to-band tunneling caused by its narrow band gap, which increases the off-current and therefore the power consumption. In this work, we present vertical heterostructure InAs/InGaAs nanowire MOSFETs with low off-currents provided by the wider band gap material on the drain side suppressing band-to-band tunneling. We demonstrate vertical III–V MOSFETs achieving off-current below 1 nA/μm while still maintaining on-performance comparable to InAs MOSFETs; therefore, this approach opens a path to address not only high-performance applications but also Internet-of-Things applications that require low off-state current levels.

中文翻译:

Si上的垂直InAs / InGaAs异质结构金属-氧化物-半导体场效应晶体管

III–V型化合物半导体具有出色的电子传输性能,为延续摩尔定律提供了一条途径。通过使用汽-液-固生长的垂直纳米线可以解决将III–V集成在Si上的一项主要挑战。尽管InAs金属氧化物半导体场效应晶体管(MOSFET)通常由于其窄带隙而导致带间隧穿,但由于其出色的迁移率,它是一种有吸引力的材料,这会增加截止电流,因此,能量消耗。在这项工作中,我们提出了垂直异质结构InAs / InGaAs纳米线MOSFET,其漏极侧的较宽禁带材料提供了低截止电流,从而抑制了带间隧穿。我们展示了垂直III–V MOSFET,其截止电流低于1 nA /μm,同时仍保持了与InAs MOSFET相当的导通性能。
更新日期:2017-09-14
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