孙亚男博士，现任上海交通大学微纳电子学系副教授。2009年获得上海交通大学微电子学本科学位，2015年获得香港科技大学电子及计算机工程学博士学位，同年加入上海交通大学，从事教学与科研工作。孙亚男博士的主要研究方向是基于新型纳米器件及存储器技术的低功耗高良率集成电路及系统设计，重点关注基于高速互连技术的三维集成电路设计、机器学习及新兴工艺在高可靠性集成电路中的应用。研究成果发表在IEEE TCAS-I, TCAS-II, TED, TVLSI, TDMR等国际期刊，以及ISCAS, ISOCC, ICM等国际会议上，曾获2014年IEEE微电子国际会议（ICM）的最佳论文奖。IEEE会员，并担任多个国际期刊和会议的审稿人。自2015年起，担任国际期刊Microelectronics Journal的副主编（Associate Editor）。
 Y. Sun, J. Gu, W. He, Q. Wang, N. Jing, Z. Mao, W. Qian, and L. Jiang, “Energy-efficient nonvolatile SRAM design based on resistive switching multi-level cells,” IEEE Transactions on Circuits and Systems II (TCAS-II), March 2019.  Y. Sun, W. He, Z. Mao, H. Jiao, and V. Kursun, “Metallic-CN-removal-tolerant high-yield six-CNMOSFET SRAM cell for carbon-based embedded memory,” IEEE Transactions on Electron Devices (TED), Vol. 65, No. 3, pp. 1230-1238, March 2018.  C. Wang, Y. Sun, S. Hu, L. Jiang, W. Qian, “Variation-aware global placement for improving timing-yield of carbon-nanotube field effect transistor circuit,” ACM Transactions on Design Automation of Electronic Systems, Vol. 23, No. 4, pp. 1-27, June 2018.  Y. Sun, W. He, Z. Mao, H. Jiao, and V. Kursun, “High-yield and robust 9T SRAM cell tolerant to removal of metallic carbon nanotubes,” IEEE Transactions on Device and Materials Reliability (TDMR), Vol. 17, No. 1, pp. 20-31, March 2017.  Y. Sun, W. He, Z. Mao, and V. Kursun, “Variable strength keeper for high-speed and low-leakage carbon nanotube domino logic,” Microelectronics Journal (MEJ), Vol. 62, pp. 12-20, February 2017.  Y. Sun, H. Jiao, and V. Kursun, “A novel robust and low-leakage SRAM cell with nine carbon nanotube transistors,” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 23, No. 9, pp. 1729-1739, September 2015.  Y. Sun and V. Kursun, “Carbon nanotubes blowing new life into NP dynamic CMOS circuits,” IEEE Transactions on Circuits and Systems I (TCAS-I), Vol. 61, No. 2, pp. 420-428, February 2014.  Y. Sun and V. Kursun, “N-type carbon-nanotube MOSFET device profile optimization for very large scale integration,” Transactions on Electrical and Electronic Materials, Vol. 12, No. 2, pp. 43-50, April 2011. (invited)  W. Jin, W. He, J. Jiang, H. Huang, X. Zhao, Y. Sun, X. Chen, and N. Jing, “A 0.33V 2.5μW cross-point data-aware write structure, read-half-select disturb-free sub-threshold SRAM in 130nm CMOS,” Integration, the VLSI Journal, Vol. 58, pp. 27-34, February 2017.  Y. Sun, W. He, Z. Mao, H. Jiao, and V. Kursun, “Statistical Modeling and Design of a 16nm 9T SRAM Cell Considering Post-Synthesis Removal of Metallic Carbon-Nanotubes,” Proceedings of the IEEE International Conference on Electronics, Information, and Communication (ICEIC), January 2019.  P. Ji, J. Gao, W. Xu, Y. Sun, W. He, and H. Wu, “Electronic-photonic integrated circuit design and crosstalk modeling for a high density multi-lane MZM array,” Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS), pp. 1-5, May 2018.  Y. Sun, Wei. He, Z. Mao, H. Jiao, and V. Kursun, “Metallic-carbon-nanotube-removal tolerant SRAM cell with 9 transistors,” Proceedings of the IEEE International Conference on ASIC (ASICON), pp. 908-911, October 2017. (invited)  L. Chen, Y. Sun*, and W. He, “Low-power single-phase clocked redundant-transition-free flip-flop design with conditional charging scheme,” Proceedings of the IEEE International Conference on ASIC (ASICON), pp. 916-919, October 2017. (invited)  W. Xu, J. Gao, P. Ji, Y. Sun, W. He, and H. Wu, “A PAM-4 optical receiver based on a silicon photonic quantizer,” IEEE International Conference on Group IV Photonics (GFP), pp. 117-118, August 2017.  J. Gao, Y. Sun, W. He, and H. Wu, “A cross-layer multi-physics design flow for electronic-photonic integrated circuits,” IEEE Photonics Conference (IPC), pp. 230-231, January 2017.