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个人简介

程然,浙江大学信电学院讲师。本科及博士毕业于新加坡国立大学。浙江大学信息与电子工程学院微纳电子研究所博士后。近年来一直从事新型IV族(Si, SiGe, Ge)MOS器件领域的模拟,工艺和测试研究。她在包括Applied Physics Letters 和 IEEE Transactions on Electron Devices等业内顶级期刊在内的学术杂志,以及包括International Electron Devices Meeting(IEDM,国际电子器件会议)和VLSI Symposia等顶级会议在内的国际会议中发表论文及大会报告近40篇(11篇第一作者文献中,IEDM一篇,VLSI一篇,TED两篇,EDL一篇)。她在应力工程集成,Si和Ge基半导体器件的制备,以及亚纳秒超快速测试表征方面有着丰富的经验。其制备的世界第一支有应变层(liner stressor)的锗纳米线(纳米线宽度仅有3.5 nm)晶体管,极大的提高了Ge MOS晶体管的性能,并被报道于知名半导体网站Semiconductor Engineering。她利用超快速测试,在超微缩晶体管的输运特性和可靠性的准确表征方面也有突破性的多项成果。在2017年,申请人作为报告人,代表浙江大学第一次在国际可靠性物理大会(IEEE Reliability Physics Symposium)上作专题报告(中国大陆仅两篇)。由于申请人在超快速可靠性表征方面的丰富经验和成果,她和国内外知名的半导体制备研发机构和公司都保持着长期紧密的合作。

研究领域

超快速半导体器件表征 器件与电路的可靠性模型 新型半导体器件工艺技术 器件物理研究

近期论文

查看导师最新文章 (温馨提示:请注意重名现象,建议点开原文通过作者单位确认)

R. Cheng, L. Yin, X. Yu, Y. Zhang, Z. Zheng, W. Wu, B. Chen, X. Liu, P. Ye, and Y. Zhao, “Experimental investigation on ballistic carrier transport characteristics of sub-100 nm Ge MOSFETs,” IEEE Elec. Dev. Lett., vol. 38, no. 4, pp.434, 2017. R. Cheng, X. Yu, B. Chen, J. Li, Y. Qu, J. Han, R. Zhang, and Y. Zhao, “Investigation of Self-heating Effect on Ballistic Transport Characterization for Si FinFETs featuring Ultrafast Pulsed IV Technique,” IEEE Trans. Elec. Dev., vol. 64, no. 3, pp. 909, 2017. X. Yu, R. Cheng, W. Liu, Y. Qu, B. Chen, J. Lu, and Y. Zhao, "Fast Vth Measurement (FVM) Techniquefor NBTI Behavior Characterization," IEEE Elec. Dev. Lett., vol. 39, no. 2, pp.172, 2018. X. Yu, R. Cheng, J. Sun, Y. Qu, J. Han, B. Chen, and Y. Zhao, "Quantitative Characterization of Fast-Trap Behaviors in Al2O3/GeOx/Ge pMOSFETs," IEEE Trans. Elec. Dev., vol. 65, no. 7, pp. 2729, 2018. W. Chen, R. Cheng, D.-W. Wang, H. Song, X. Wang, H. Chen, E. Li, W.-Y. Yin, and Y. Zhao, “Electrothermal Effects on Hot-Carrier Reliability in SOI MOSFETs—AC Versus Circuit-Speed Random Stress,” IEEE Trans. Elec. Dev., vol. 63, pp. 3669, 2016. R. Cheng, Y. Ding, S.-M. Koh,Y. Yang, F. Bai, B. Liu, and Y.-C. Yeo, “GeTe liner stressor featuring phase-change- induced volume contraction for strain engineering of sub-50-nm p-channel finfets: simulation and electrical characterization”, IEEE Trans. Elec. Dev., vol. 61, no. 8, pp. 2647-2655, Aug. 2014. R. Cheng, W. Wang, X. Gong, L. Sun, P. Guo, H. Hu, Z. Shen, G. Han, and Y.-C. Yeo, “Relaxed and strained patterned germanium-tin structures: A Raman scattering study,” ECS J. Solid State Sci. Techno., vol. 2, no. 4, pp. P138 - P145, Jan. 2013. R. Cheng, B. Liu, and Y.-C. Yeo, “Carrier transport in strained p-channel field-effect transistors with diamond-like carbon liner stressor,” Appl. Phys. Lett., vol. 96, no. 9, 092113, Mar. 2010. P. Guo, R. Cheng, W. Wang, Z. Zhang, J. Pan, E. S. Tok, and Y.-C. Yeo, “silicon surface passivation technology for germanium-tin p-channel MOSFETs: Suppression of germanium and tin segregation for mobility enhancement,” ECS J. Solid State Sci. Techno., vol. 3, no. 8, Q162-Q168, 2014. Y. Ding, R. Cheng, S.-M. Koh, B. Liu, and Y.-C. Yeo, “Phase-change liner stressor for strain engineering of p-channel FinFETs,” IEEE Trans. Elec. Dev., vol. 60, Aug. 2013. Y. Ding, R. Cheng, A. Du, and Y.-C. Yeo, “Lattice strain analysis of silicon fin field-effect transistor structures wrapped by Ge2Sb2Te5 liner stressor,” J Appl. Phys., vol. 113, no. 7, 073708, Feb. 2013. Y. Ding, R. Cheng, Q. Zhou, A. Du, N. Daval, B.-Y. Nguyen, and Y.-C. Yeo, “Strain engineering of ultra-thin silicon-on-insulator structures using through-buried-oxide ion implantation and crystallization,” Solid State Electronics, vol. 83, pp. 37 - 41, Feb. 2013.

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