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C. H. Hung, Y. Q. Zheng, J. Guo and K. N. Leung, “Bandwidth and Slew Rate Enhanced OTA with Sustainable Dynamic Bias,” IEEE Transactions on Circuits and Systems II: Express Brief (TCAS-II), accepted for publication.
G. Li, H. Qian, J. Guo*, B. Mo, Y. Lu, and D. Chen, “Dual Active-Feedback Frequency Compensation for Output-Capacitorless LDO with Transient and Stability Enhancement in 65-nm CMOS,” IEEE Transactions on Power Electronics (TPEL), accepted for publication.
Q. Cheng, W. Li, X. Tang, and J. Guo*, “Design and Analysis of Three-Stage Amplifier for Driving pF-to-nF Capacitive Load Based on Local Q-Factor Control and Cascode Miller Compensation Techniques,” Electronics, 2019, 8(5), 572, pp. 1−18. (SCI, IF: 2.110).
S. Bu, K. N. Leung, Y. Lu, J. Guo, and Y. Zheng, “A Fully Integrated Low-Dropout Regulator with Differentiator-Based Active Zero Compensation,” IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I), Vol. 65, No. 10, pp. 3578−3591, Oct. 2018. (SCI, IF: 2.407).
Z. Wang, B. Chen, L. Zhu, Y. Zheng, J. Guo*, D. Chen, M. Ho, and K. N. Leung, “A 3.3-MHz fast-response load-dependent-on/off-time buck-boost DC-DC converter with low-noise hybrid full-wave current sensor,” Microelectronics Journal, Vol. 74, No. 4, pp. 1−12, Apr. 2018. (SCI, IF: 1.163)
S. Bu, J. Guo, and K. N. Leung*, “A 200-ps-Response-Time Output-Capacitorless Low-Dropout Regulator with Unity-Gain Bandwidth >100 MHz in 130-nm CMOS,” IEEE Transactions on Power Electronics (TPEL), Vol. 33, No. 4, pp. 3232−3246, Apr. 2018. (SCI, IF: 7.151)
Y. Zheng, M. Ho, J. Guo*, and K. N. Leung, “A Single-Inductor Multiple-Output Auto-Buck-Boost DC-DC Converter with Tail-Current Control,” IEEE Transactions on Power Electronics (TPEL), Vol. 31, No. 11, pp. 7857−7875, Nov. 2016. (SCI, IF: 6.008)
M. Ho, J. Guo, K. H. Mak, W. L. Goh, S. Bu, Y. Zheng, X. Tang, and K. N. Leung*, “A CMOS Low-Dropout Regulator with Dominant-Pole Substitution,” IEEE Transactions on Power Electronics (TPEL), Vol. 31, No. 9, pp. 6362−6371, Sep. 2016. (SCI, IF: 6.008)
M. Ho, J. Guo, T. W. Mui, K. H. Mak, W. L. Goh, H. C. Poon, S. Bu, M. W. Lau, and K. N. Leung*, “A Two-Stage Large-Capacitive-Load Amplifier with Multiple Cross-Coupled Small-Gain Stages,” IEEE Transactions on VLSI Systems (TVLSI), Vol. 24, No. 7, pp. 2580−2592, Jul. 2016. (SCI, IF: 1.245)
Y. Zheng, M. Ho, J. Guo, K-L Mak, and K. N. Leung*, “A Single-Inductor Multiple-Output Auto-Buck-Boost DC-DC Converter with Auto Phase Allocation,” IEEE Transactions on Power Electronics (TPEL), Vol. 31, No. 3, pp. 2296−2313, Mar. 2016. (SCI, IF: 6.008, Top accessed TPEL paper in Nov. 2015)
J. Guo*, M. Ho, K. N. Leung, and G. Li, “Digitally-assisted constant-on-time dynamic-biasing technique for bandwidth and slew-rate enhancement in ultra-low-power low-dropout regulator,” International Journal of Circuit Theory and Applications (IJCTA), Vol. 44, No. 2, pp. 504−513, Feb. 2016. DOI: 10.1002/cta.2091. (SCI, IF: 1.254)
K. H. Mak, M. W. Lau, J. Guo, T. W. Mui, M. Ho, W. L. Goh, and K. N. Leung*, “A 0.7-V 24-µA Hybrid OTA Driving 15-nF Capacitive Load with 1.46-MHz GBW,” IEEE Journal of Solid-State Circuits (JSSC), Vol. 50, No. 11, pp. 2750−2757, Nov. 2015. (SCI, IF: 3.009, Top 1 journal in IC design, Top accessed JSSC paper in Oct. and Nov. 2015)
M. Huang, D. Chen, J. Guo*, H. Ye, K. Xu, X. Liang, and Y. Lu, “A CMOS Delta Sigma PLL Transmitter with Efficient Modulation Bandwidth Calibration,” IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I), Vol. 62, No. 7, pp. 1716−1725, Jul. 2015. (SCI, IF: 2.403)
M. Huang, D. Chen, Z. Wang, J. Guo*, E. H. Dagher, B. Xu, K. Xu, H. Ye, W. Zheng, Z. Liang, X. Liang, and W. K. Masenten, “A power-area-efficient, 3-band, 2-RX MIMO, TD-LTE receiver with direct-coupled ADC,” International Journal of Circuit Theory and Applications (IJCTA), pp. 806−821, Jun. 2015. (SCI, IF: 1.254)
J. Guo*, M. Ho, K. Y. Kwong, and K. N. Leung, “Power-Area-Efficient Transient-Improved Capacitor-Free FVF-LDO With Digital Detecting Technique,” IET Electronics Letters (EL), Vol. 51, No. 1, pp. 94–96, Jan. 2015. (SCI, IF: 0.930, Top accessed EL paper in Jan., Mar., Apr., and Jun., 2015)
M. Huang, D. Chen, J. Guo*, K. Xu, H. Ye, X. Liang, E. H. Dagher, B. Xu, and W. K. Masenten, “A Tri-Band, 2-RX MIMO, 1-TX TD-LTE CMOS Transceiver,” Microelectronics Journal, Vol. 46, No. 1, pp. 59−66, Jan. 2015. (SCI, IF: 0.836)
T. W. Mui, M. Ho, K. H. Mak, J. Guo, H. Chen, and K. N. Leung*, “An Area-Efficient 96.5%-Peak-Efficiency Cross-Coupled Voltage Doubler With Minimum Supply of 0.8V,” IEEE Transactions on Circuits and Systems II: Express Brief (TCAS-II), Vol. 61, No. 9, pp. 656−660, Sep. 2014. (SCI, IF: 1.234)
J. Guo and K. N. Leung*, “A CMOS Voltage Regulator for Passive RFID Tag ICs,” International Journal of Circuit Theory and Applications (IJCTA), Vol. 40, No. 4, pp. 329−340, Apr. 2012. (SCI, IF: 1.254)
J. Guo and K. N. Leung*, “A 6-µW Chip-Area-Efficient Output-Capacitorless LDO in 90-nm CMOS Technology,” IEEE Journal of Solid-State Circuits (JSSC), Vol. 45, No. 9, pp. 1896−1905, Sep. 2010. (SCI, IF: 3.009; Top 1 journal in IC design; Most accessed JSSC paper in Sep. 2010, ranked 7th and 10th of the top 10 accessed JSSC paper in Oct. 2010 and Nov. 2010, respectively; Ranked 14th and 100th of the top 100 downloaded documents in Sep. 2010 and Nov. 2010, respectively, in IEEE Xplore)
C. F. Chan, K. P. Pun*, K. N. Leung, J. Guo, L. L. K. Leung, and C. S. Choy, “Low-Power Continuously-Calibrated Clock Recovery Circuit for UHF RFID EPC Class-1 Generation-2 Transponders,” IEEE Journal of Solid-State Circuits (JSSC), Vol. 45, No. 3, pp. 587−599, Mar. 2010. (SCI, IF: 3.009; Top 1 journal in IC design)
J. Guo*, Y. Cao, and X. Lai, “An Inner ESR-Fungible Compensation Technique for CMOS Low Dropout Regulator,” Analog Integrated Circuits and Signal Processing (AICSP), Vol. 61, No. 3, pp. 265−270, Dec. 2009. (SCI, IF: 0.468)
X. Lai, J. Guo*, Z. Sun, and J. Xie, “A 3-A CMOS Low Dropout Regulator with Adaptive Miller Compensation,” Analog Integrated Circuits and Signal Processing (AICSP), Vol. 49, No. 1, pp. 5−10, Oct. 2006. (SCI, IF: 0.468)
J. Guo and K. N. Leung, “A 25mA CMOS LDO with −85dB PSRR at 2.5MHz,” IEEE Asian Solid-State Circuits Conference (A-SSCC), Singapore, pp. 381−384, Nov. 2013.
J. Guo and K. N. Leung, “High PSRR LDO with Embedded Ripple Feed-Forward Path,” IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, California, USA, Student Research Preview, Feb. 20, 2011. (Top 1 conference in IC design, also known as "the Chip Olympics"，Student Travel Grant Award).
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