近期论文
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Journal Papers:
[1] Z. Liu#, J. Mei#, J. Tang*, M. Xu*, B. Gao, K. Wang., S. Ding, Q. Liu, Q. Qin, W. Chen, Y. Xi, Y. Li, P. Yao, H. Zhao, N. Wong, H. Qian, B. Hong, T.-P. Jung, D. Ming*, H. Wu*, “A Memristor-based adaptive neuromorphic decoder for brain-computer interfaces”, Nature Electronics, published online (2025).
[2] H. Huang, X. Liang, Y. Wang*, J. Tang*, Y. Li, Y. Du, W. Sun, J. Zhang, P. Yao, X. Mou, F. Xu, J. Zhang, Y. Lu, Z. Liu, J. Wang, Z. Jiang, R. Hu, Z. Wang, Q. Zhang, B. Gao, X. Bai, L. Fang, Q. Dai, H. Yin, H. Qian, H. Wu*, “Fully integrated multimodal optoelectronic memristor array for diversified in-sensor computing applications”, Nature Nanotechnology, 20, 93 (2025). (Cover Image)
[3] X. Li#, B. Qin#, Y. Wang#, Y. Xi, Z. Huang, M. Zhao, Y. Peng, Z. Chen, Z. Pan, J. Zhu, C. Cui, R. Yang, W. Yang, S. Meng, D. Shi, X. Bai, C. Liu, N. Li, J. Tang*, K. Liu*, L. Du*, G. Zhang*, “2D Sliding ferroelectric memories and synapses”, Nature Communications, 15, 10921 (2024).
[4] H. Xu, D. Shang*, J. Tang*, Q. Luo, X. Xu, R. Liang, L. Pan, B. Gao, Q. Wang, D. He, Q. Liu*, M. Liu, H. Qian, H. Wu*, “A biomimetic nociceptor based on a vertical multi-gate, multi-channel neuromorphic transistor”, ACS Nano, 18, 30668 (2024).
[5] X. Liang, J. Tang*, Y. Zhong, B. Gao, H. Qian, H. Wu*, “Physical reservoir computing with emerging electronics”, Nature Electronics, 7, 193 (2024).
[6] Y. Du, J. Tang*, Y. Li, Y. Xi, Y. Li, J. Li, H. Huang, Q. Qin, Q. Zhang, B. Gao, N. Deng, H. Qian, H. Wu, “Monolithic 3D Integration of Analog RRAM-Based Computing-in-Memory and Sensor for Energy-Efficient Near-Sensor Computing” Advanced Materials, 36, 202302658 (2024).
[7] Y. Fan, R. An, J. Tang*, Y. Li, T. Liu, B. Gao, H. Qian, H. Wu, “Monolithic 3D integration as a pathway to energy-efficient computing and beyond: From materials and devices to architectures and chips”. Current Opinion in Solid State and Materials Science, 33, 101199 (2024).
[8] Y. Li, J. Tang*, J. Yao, A. Fan, B. Yan, Y. Yang, Y. Xi, Y. Li, J. Li, W. Sun, Y. Du, Z. Liu, Q. Zhang, S. Qiu, Q. Li, H. Qian, H. Wu*, “Monolithic three-dimensional integration of RRAM-based hybrid memory architecture for one-shot learning”, Nature Communications, 14, 7140 (2023).
[9] H. Zhao#, Z. Liu#, J. Tang*, B. Gao, Q. Qin, J. Li, Y. Zhou, P. Yao, Y. Xi, Y. Lin, H. Qian, H. Wu, “Energy-Efficient High-Fidelity Image Reconstruction with Memristor Arrays for Medical Diagnosis”, Nature Communications, 14, 2276 (2023).
[10] H. Xu, D. Shang*, Q. Luo, J. An, Y. Li, S. Wu, Z. Yao, X. Xu, P. Zhang, C. Dou, H. Jiang, L. Pan, X. Zhang, M. Wang, Z. Wang, J. Tang*, Q. Liu*, M. Liu, “A low-power vertical dual-gate neurotransistor with short-term memory for high energy-efficient neuromorphic computing”, Nature Communications, 14, 6385 (2023).
[11] X. Li, Y. Zhong, H. Chen, J. Tang*, X. Zheng, W. Sun, Y. Li, D. Wu, B. Gao, X. Hu*, H. Qian, H. Wu*, “A Memristors-based Dendritic Neuron for High-Efficiency Spatial-Temporal Information Processing”, Advanced Materials, 35, 2203684 (2023).
[12] Y. Zhong, J. Tang*, X. Li, X. Liang, Z. Liu, Y. Li, Y. Xi., P. Yao, Z. Hao, B. Gao, H. Qian, H. Wu*, “A Memristor-based Analogue Reservoir Computing System for Real-Time and Power-Efficient Signal Processing”, Nature Electronics, 5, 672-681 (2022). (Selected as Editorials)
[13] X. Liang#, Y. Zhong#, J. Tang*, Z. Liu, P. Yao, K. Sun, Q. Zhang, B. Gao, H. Heidari*, H. Qian, H. Wu*, “Rotating Neurons for All-Analog Implementation of Cyclic Reservoir Computing”, Nature Communications, 13, 1549 (2022). (Featured in Nature Communications Editors’ Highlights)
[14] Z. Zhao, J. Tang*, J. Yuan, Y. Li, Y. Dai*, J. Yao, Q. Zhang, S. Ding, T. Li, R. Zhang, Y. Zheng, Z. Zhang, S. Qiu, Q. Li, B. Gao, N. Deng, H. Qian, F. Xing, Z. You, H. Wu*, “Large-Scale Integrated Flexible Tactile Sensor Array for Sensitive Smart Robotic Touch”, ACS Nano 16, 16784-16795 (2022).
[15] X. Mou, J. Tang*, Y. Lyu, Q. Zhang, S. Yang, F. Xu, W. Liu, M. Xu, Y. Zhou, W. Sun, Y. Zhong, B. Gao, P. Yu*, H. Qian, H. Wu*, “Analog Memristive Synapse based on Topotactic Phase Transition for High-Performance Neuromorphic Computing and Neural Network Pruning”, Science Advances, 7, abh0648 (2021).
[16] Y. Zhong, J. Tang*, X. Li, B. Gao, H. Qian, H. Wu*, “Dynamic Memristor-based Reservoir Computing for High-Efficiency Temporal Signal Processing”, Nature Communications, 12, 408 (2021).
[17] X. Li#, J. Tang#, Q. Zhang#, B. Gao, J. Joshua Yang, S. Song, W. Wu, W. Zhang, P. Yao, N. Deng, L. Deng, Y. Xie, H. Qian, H. Wu*, “Power-Efficient Neural Network with Artificial Dendrites”, Nature Nanotechnology, 15, 776 (2020).
[18] Z. Liu, J. Tang*, B. Gao, X. Li, P. Yao, Y. Lin, D. Liu, B. Hong, H. Qian, H. Wu*, “Multi-Channel Parallel Processing of Neural Signals in Memristor Arrays”, Science Advances, 6, eabc4797 (2020).
[19] Z. Liu, J. Tang*, B. Gao, P. Yao, X. Li, D. Liu, Y. Zhou, H. Qian, B. Hong*, H. Wu*, “Neural Signal Analysis with Memristor Arrays Towards High-Efficiency Brain-Machine Interfaces”, Nature Communications, 11, 4234 (2020).
[20] Y. Li, J. Tang*, B. Gao, W. Sun, Q. Hua, W. Zhang, X. Li, W. Zhang, H. Qian, H. Wu*, “High-Uniformity Threshold Switching HfO2-based Selectors with Patterned Ag Nanodots”, Advanced Science, 7, 2002251 (2020).
[21] J. Tang#, F. Yuan#, X. Shen#, Z. Wang, M. Rao, Y. He, Y. Sun, X. Li, W. Zhang, Y. Li, B. Gao, H. Qian, G. Bi, S. Song, J. Joshua Yang*, H. Wu*, “Bridging Biological and Artificial Neural Networks with Emerging Neuromorphic Devices: Fundamentals, Progress, and Challenges”, Adv. Mater., 31, 1902761 (2019).
Conference Proceedings:
[22] T. Liu, J. Tang*, Y. Du, H. Yang, Y. Zhang, Z. Liu, Z. Jiang, R. An, Y. Xi, Y. Li, D. Wu, B. Gao, H. Qian, H. Wu*, “IGZO/TeOx Complementary Oxide Semiconductor-based CFET for BEOL-Compatible Memory-Immersed Logic”, IEDM Tech. Dig., 5.3.1-5.3.4 (2024). (IEDM Highlight Paper)
[23] Y. Su#, T. Liu#, J. Tang*, Y. Li, R. An, Y. Du, Z. Tang, Y. Zhang, Y. Fan, Y. He, M. Shi, H. Yang, T. Huang, J. Zhang, Z. Zhu, G. Wang, C. Zhao, C. Wang, L. Pan, P. Yao, D. Wu, B. Gao, H. Qian, and H. Wu, “Complementary Oxide Semiconductor-based 2T0C DRAM Macro with CFET peripherals using TeOx-PFET/IGZO-NFET for 3D Memory Integration”, IEDM Tech. Dig., 6.5.1-6.5.4 (2024).
[24] J. Zhang#, X. Ma#, Y. Xi, Y. Lu, K. Wang, H. Ren, J. Tang*, L. Pan*, L. Chen, D. Wu, B. Gao, H. Qian, H. Wu*, “A 28nm 4Mb Embedded RRAM IP with Record-High Endurance of 107 Cycles and 10years@125°C Retention through Reliability-Enhanced Design-Technology Co-Optimization”, IEDM Tech. Dig., 11.6.1-11.6.4 (2024).
[25] Y. Zhang, J. Tang*, Y. Li, N. Gao, L. Gao, H. Xu*, R. An, H. Yang, Z. Liu, C. Guo, W. Bu, D. Wu, B. Gao, H. Qian, H. Wu*, “Monolithic 3D Integration of Multi-layer CNT-CMOS/RRAM Macros for Mixed-Precision Analog-Digital Computing-in-Memory Architecture”, IEDM Tech. Dig., 5.7.1-5.7.4 (2024).
[26] H. Yang#, Y. Li#, J. Tang*, R. An, Y. Zhang, L. Gao, N. Gao, H. Xu, Y. Du, Z. Liu, X. Ma, G. Wang, C. Zhao, J. Xiang, J. Zhao, W. Bu, K. Zheng, J. Kang, B. Gao, H. Qian, H. Wu, “Monolithic 3D Integration of Analog RRAM-based Fully Weight Stationary and Novel CFET 2T0C-based Partially Weight Stationary for Accelerating Transformer”, VLSI, JFS6.5 (2024).
[27] Y. Zhang#, Y. Li#, J. Tang*, N. Gao, L. Gao, H. Xu*, R. An, Q. Qin, Z. Liu, D. Wu, B. Gao, H. Qian, H. Wu*, “3D Stackable CNTFET/RRAM 1T1R Array with CNT CMOS Peripheral Circuits as BEOL Buffer Macro for Monolithic 3D Integration with Analog RRAM-based Computing-In-Memory”, IEDM Tech. Dig., 23.2.1-23.2.4 (2023). (IEDM Highlight Paper)
[28] M. Shi#, Y. Su#, J. Tang*, Y. Li, Y. Du, R. An, J. Li, Y. Li, J. Yao, R. Hu, Y. He, Y. Xi, Q. Li, S. Qiu, Q. Zhang, L. Pan, B. Gao, H. Qian, H. Wu, “Counteractive Coupling IGZO/CNT Hybrid 2T0C DRAM Accelerating RRAM-based Computing-In-Memory via Monolithic 3D Integration for Edge AI”, IEDM Tech. Dig., 14.2.1-14.2.4 (2023).
[29] Z. Jiang, Y. Xi, J. Tang*, Y. Lu, R. Yu, R. Hu, Q. Hu, B. Gao, H. Qian, H. Wu*, “COPS: An Efficient and Reliability-Enhanced Programming Scheme for Analog RRAM and On-Chip Implementation of Denoising Diffusion Probabilistic Model”, IEDM Tech. Dig., 21.1.1-21.1.4 (2023).
[30] Y. Du, J. Tang*, Y. Li, Y. Xi, B. Gao, H. Qian, H. Wu, “Monolithic 3D Integration of FeFET, Hybrid CMOS Logic and Analog RRAM Array for Energy-Efficient Reconfigurable Computing-In-Memory Architecture”, VLSI, T15-4 (2023).
[31] R. An#, Y. Li#, J. Tang*, B. Gao, Y. Du, J. Yao, Y. Li, S. Wen, H. Zhao, J. Li, Q. Qin, Q. Zhang, S. Qiu, Q. Li, Z. Li*, H. Qian, H. Wu*, “A Hybrid Computing-In-Memory Architecture by Monolithic 3D Integration of BEOL CNT/IGZO-based CFET Logic and Analog RRAM”, IEDM Tech. Dig., 18.1.1-18.1.4 (2022). (IEDM Brain Best Paper Award)
[32] Y. Li, J. Tang*, B. Gao, J. Yao, Y. Xi, Y. Li, T. Li, Y. Zhou, Z. Liu, Q. Zhang, S. Qiu, Q. Li, H. Qian, H. Wu*, “Monolithic 3D Integration of Logic, Memory and Computing-In-Memory for One-Shot Learning”, IEDM Tech. Dig., 21.5.1-21.5.4 (2021). (IEDM Highlight Paper)
[33] H. Zhao, Z. Liu, J. Tang*, B. Gao, Y. Zhou, P. Yao, Y. Xi, H. Qian, H. Wu*, “Implementation of Discrete Fourier Transform using RRAM Arrays with Quasi-Analog Mapping for High-Fidelity Medical Image Reconstruction”, IEDM Tech. Dig., 12.4.1-12.4.4 (2021).
[34] Y. Lin, Q. Zhang, J. Tang*, B. Gao, C. Li, P. Yao, Z. Liu, J. Zhu, J. Lu, S. X. Hu, H. Qian, H. Wu*, “Bayesian Neural Network Realization by Exploiting Inherent Stochastic Behavior of Analog RRAM”, IEDM Tech. Dig., 14.6.1-14.6.4 (2019).