Successive crystallization in indium selenide thin films for multi-level phase-change memory

Highlights

• Three resistance states with clear distinction are obtained in indium selenide phase-change thin films.

• Amorphous indium selenide thin films crystallize at two different temperatures to form two crystalline phases.

• Reversible switch between three resistance states as fast as 60 ns is implemented in In₂Se₃-based PCM cells.

• Successive crystallization in indium selenide thin films is applicable to multi-level phase-change memory.

Abstract

Increasing the storage density of phase-change memory is a challenging subject towards the universal memory commercialization. Multi-level data storage can be implemented in phase-change memory cells by designing multiple stages of crystallization of phase-change materials, which is favorable to push forward the application of phase-change memory in storage-class memory and the emerging in-memory computing. Here, the structure and properties of In₂Se₃ phase-change thin films with multi-level phase transitions are investigated. The In₂Se₃ thin films changes resistance states twice upon heating with high crystallization temperature and good thermal stability. The amorphous In₂Se₃ thin films undergo partial crystallization of the Se phase followed by crystallization of the γ-In₂Se₃ phase, with successive stages of crystallization accounting for the three distinct levels of resistivity. The phase-change memory cell based on In₂Se₃ thin films shows a continuous switching process of high resistance state, intermediate resistance state and low resistance state with low drift coefficient in SET-RESET operations at a speed as fast as 60 ns, and the RESET power is as low as 311 pJ, indicating that the In₂Se₃ thin films have good performance of three-state storage property and can effectively improve the memory density.

Introduction

With the increasing amount of data to be processed in high-performance computing, artificial intelligence, and deep learning, traditional storage solutions face the challenge of insufficient performance, including high latency and limited capacity. To address this challenge, storage-class memory (SCM) has emerged as a next-generation memory solution that offers large capacity and fast access speed for storing massive amounts of data [1]. Among various SCM candidates, PCM exhibits non-volatile characteristic, excellent cycling endurance to 10⁷ operations, promising scalability in sub-10 nm node and steady process maturity for 3D integrated circuits (3D-IC), which is more suitable for SCM requirements [2], [3], [4]. In PCM, high resistance state (HRS) of amorphous phase and low resistance state (LRS) of crystalline phase in phase-change materials are identified as binary logic ‘0′ and ‘1′, and the phase transition can be triggered reversibly by electric pulse or laser [5]. The switching process has been interpreted as a combination of both phase-change and electrolytic mechanisms [6]. PCM commonly uses chalcogenides from the Ge-Sb-Te ternary phase diagram, such as Ge₂Sb₂Te₅ (GST), Sb₂Te₃, and GeTe. These materials possess properties that attract a significant amount of research aimed at optimizing memory performance. Among them, Sb₂Te₃ with growth-dominated crystallization has been leveraged for fast memory switching [7], [8]. Furthermore, recent research has shown that interfacial PCM, utilizing GeTe/Sb₂Te₃ superlattices, exhibits outstanding device performance and offers promising research value in terms of unconventional structural evolution [9], [10].

However, the general PCM cell only stores 1-bit binary data due to the phase-change mechanism, which is still insufficient for high density storage-class memory applications. Multi-level cell (MLC) technology enables higher bit density in the PCM cells, resulting in more cost-effective memory devices. The large resistivity contrast between the amorphous and crystalline phases favors the introduction of intermediate resistance states for storing two or more bits per cell. The ability to store information at multiple resistance states is based on the principle of partial crystallization of the phase-change materials, e.g., applying electrical programming pulses to control the ratio of crystallization [11], [12], [13]. Nevertheless, the reliability of multi-level storage in PCM is seriously challenged by the phenomenon of resistance drift and the impact of temperature because of the spontaneous structural relaxation of amorphous phase.

Designing multilayer phase-change thin films is an effective strategy to achieve partial crystallization for multi-level storage. By utilizing the difference in crystallization temperature and crystalline resistance of different phase-change layers, three resistance states can be generated in multilayer thin films for data storage [14], [15], [16], [17]. The limitation is, since there is single amorphous-crystalline phase transition in common phase-change materials, only one intermediate state can be obtained in multilayer thin films. In order to further increase the memory density, more resistance states need to be realized in the monolayer phase-change thin films. Actually, GST and Sb₂Te₃ materials have phase transitions from the amorphous phase to the cubic phase and then to the hexagonal phase upon heating. However, the difference in resistivity between the cubic and hexagonal phases of GST thin films is too small to realize multiple resistance states in PCM. This can be manifested in nanowire structures of GST [18]. Doping yttrium elements into Sb₂Te₃ can stabilize the metastable cubic phase structure and induce reversible cubic-to-hexagonal transition within the amorphous-crystalline transition [19], [20]. This optimization is also utilized to achieve advanced multi-level phase-change memory [21]. On the other hand, Liu et al [22] designed double crystallization stages in Zn-doped Sb₇₀Se₃₀ thin films and found the phase-change processes were mainly attributed to the crystallization of the Sb and ZnSb phases. The key point is to find chalcogenide compounds with the possibility of multiple phase transitions at different temperatures.

Indium selenide (In₂Se₃) has rich crystalline phase structures (α, β, γ and κ phases). Researchers have discovered that In₂Se₃ has room-temperature ferroelectricity at the two-dimensional scale [23] and realized ferroelectric memory applications based on two-dimensional In₂Se₃ materials [24]. The phase change characteristics of In₂Se₃ can also be used for PCM applications. Lee et al [25] found that amorphous In₂Se₃ films could be transformed to γ-In₂Se₃ phase upon heating. In the study of polymorphic transitions, Tao et al [26] reported for the first time the preparation of single-crystal In₂Se₃ thin layers using mechanical exfoliation and studied the α → β crystalline transformation of the thin layers and the corresponding electrical property changes. Drawing on the concept of crystalline-crystalline transitions in GeTe/Sb₂Te₃ superlattice, Choi et al [27] designed a two-dimensional In₂Se₃ stacked thin film device to realize the reversible transition of low resistance β-phase and high resistance γ-phase. In₂Se₃ has the potential for multi-level storage in PCM applications due to the significant difference in the band gap of crystalline phases, which can exhibit differences in resistivity. In this paper, the crystallization stages of amorphous In₂Se₃ thin films are studied in detail. The structural and property changes of In₂Se₃ phase-change thin films at different temperatures are analyzed, and the possibility of their use for multi-level phase-change memory is discussed.