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Hyperchaining for LLVM-Based Binary Translators on the x86-64 Platform

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Abstract

Rabbit is an LLVM-based hybrid binary translator with several innovative optimizations (including an extension to traditional block chaining, called hyperchaining) to improve the performance. In addition to platform-independent hyperchaining (indep), Rabbit also includes platform-dependent hyperchaining (dep) on both x86-64 and RISC-V architectures for both direct and indirect branches. The dep optimizations leverage architecture-specific instructions and patches to achieve the same effect as the indep optimization but gains more performance improvements. The experimental results show that the platform-dependent hyperchaining can achieve 1.08x and 1.05x speedup in comparison with platform-independent hyperchaining for direct and indirect branches, respectively. The experimental results also show that platform-dependent hyperchaining incurs little memory space overhead in comparison with platform-independent hyperchaining.

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Data Availability

The datasets generated during and/or analysed during the current study are available from the corresponding author on reasonable request.

Notes

  1. Stblocks mean the translated code blocks which are generated from static binary translation. Dtblocks mean the translated code blocks which are generated from dynamic binary translation. We will discuss those notions in later sections.

  2. In contrast, a direct branch has exactly one destination.

  3. Because the length of an x86-64 instruction is not fixed, finding the starting address of an x86-64 instruction is not easy. In contrast, the starting address of a RISC-V instruction is always a multiple of 4.

  4. r64 denotes any 64-bit register.

  5. \(0.57 = 880/1560\)

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Acknowledgements

This work was supported by Ministry of Science and Technology, Taiwan, R.O.C., under grant MOST 108-2221-E-009-050-MY3. An 8-page summary of this paper has been accepted by 2021 International Workshop on Embedded Multicore Systems (ICPP-EMS 2021), co-located with International Conf. Parallel Processing (ICPP 2021), August 9-12, 2021, Lemont, IL, USA.

Funding

This study was partially supported by the Ministry of Science and Technology of Taiwan [grant number MOST 108-2221-E-009-050-MY3].

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  1. Wuu Yang have contributed equally to this work.

Authors and Affiliations

  1. Computer Science Department, National Yang-Ming Chiao-Tung University, 1001 University Road, Hsinchu, 300, Taiwan, R.O.C.

    Jyun-Kai Lai & Wuu Yang

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  1. Jyun-Kai Lai
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  2. Wuu Yang
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All authors contributed to the study conception and design. All authors read and approved the manuscript.

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Correspondence to Wuu Yang.

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Lai, JK., Yang, W. Hyperchaining for LLVM-Based Binary Translators on the x86-64 Platform. J Sign Process Syst 94, 1569–1589 (2022). https://doi.org/10.1007/s11265-022-01803-1

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