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Low Area High-speed Hardware Implementation of Fast FIR Algorithm for Intelligent Signal Processing application in Complex Industrial Systems

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Abstract

Finite Impulse Response (FIR) filters are widely used in biomedical, communication and audio signal processing applications due to their various advantages such as guaranteed stability and linear phase. The intelligent signal processing application with complex industrial systems can be implemented with the help of FIR filter design. In recent days, the design of the FIR filters is mainly controlled by the multiplication operations that lead to huge hardware utilization and delay. Therefore, the modified FIR filter is required to be developed with optimal multiplier and adder for improving the better performance in terms of hardware resource utilization and delay. In this paper, the 8-tap Fast FIR Algorithm (FFA) filter is proposed for decreasing hardware utilization. Here, the logical elements of the FFA filter are minimized using the Vedic multiplier (VM) and Carry Lookahead Adder (CLA). Additionally, the reduction in the logical elements leads to minimizing the delay which leads to increases in the operating frequency of the 8-tap FFA filter. Moreover, this proposed FFA-VM-CLA system is also analyzed in the Field Programmable Gate Array (FPGA) device of Spartan 6. The performance of the FFA-VM-CLA system is analyzed in terms of number of slice registers, flip flops, number of slices, Look Up Tables (LUTs), number of logical elements, slices, bonded Input/Output Block (IOB), delay, power and operating frequency. There are five different existing methods used to evaluate the FFA-VM-CLA system such as FIR-TDO, FIR-DNS, SLU-OBC-DA-FIR, FPPE and BP-FIR. The LUT of the FFA-VM-CLA system designed in the Virtex 5 is 174, it is less when compared to the FIR-TDO and SLU-OBC-DA-FIR.

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  1. Department of ECE, Jawaharlal Nehru Technological University Kakinada, Kakinada, Andhra Pradesh, India

    Pushpalatha Pondreti & K. Babulu

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  1. Pushpalatha Pondreti
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  2. K. Babulu
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Correspondence to Pushpalatha Pondreti.

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Pondreti, P., Babulu, K. Low Area High-speed Hardware Implementation of Fast FIR Algorithm for Intelligent Signal Processing application in Complex Industrial Systems. J Sign Process Syst 95, 225–240 (2023). https://doi.org/10.1007/s11265-022-01762-7

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