Skip to main content
Log in

JFET and MOSFET SPICE Models in a Wide Temperature Range

  • Published:
Russian Microelectronics Aims and scope Submit manuscript

Abstract

The schematic design of electronic devices for harsh environments requires SPICE models of electronic components that take into account the influence of ultralow and ultrahigh ambient temperatures. However, the standard SPICE models of components in commercial versions of SPICE-like simulators provide sufficient accuracy in a limited temperature range (–60 to 150°С) and cannot be used for calculating electronic circuits in the range from ultralow to ultrahigh temperatures. This paper presents modified Low-T and High-T SPICE models of field-effect transistors with the MOSFET and JFET structure, intended for calculating electronic circuits in the temperature range from ultralow to ultrahigh (–200 to 300°С) temperatures. All the models are built using a universal approach, which consists of adding additional expressions for the temperature-dependent parameters of the model to the basic SPICE model of the devices. A procedure for extracting the parameters of SPICE models based on the results of measurements or TCAD modeling of the standard set of I–V and CV characteristics in a wide temperature range is developed. The error in describing the static I–V characteristics of MOSFET and JFET transistors does not exceed 10–12% in the temperature range –200 to 300°С.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Fig. 1.
Fig. 2.
Fig. 3.

Similar content being viewed by others

REFERENCES

  1. Extreme Environment Electronics, Cressler, J.D. and Mantooth, H.A., Eds., Boca Raton: CRC, 2017.

    Google Scholar 

  2. Akturk, K., Peckerar, M., Otbhare, S., et al., Compact modeling of 0.35 μm SOI CMOS technology node for 4 K DC operation using Verilog-A, J. Microelectron. Eng., 2010, vol. 87, no. 12, pp. 2518–2524.

    Article  Google Scholar 

  3. Petrosyants, K.O., Compact device models for BiCMOS VLSIs simulation in the extended temperature range (from –200°C to 300°C), in Proceedings of the 2018 24rd International Workshop on Thermal Investigations of ICs and Systems (THERMINIC), IEEE, 2018, pp. 1–6.

  4. Mousa, R., Planson, D., Morel, H., and Raynaud, C., High temperature characterization of SiC-JFET and modelling, in Proceedings of the 2007 European Conference on Power Electronics and Applications, IEEE, 2007, pp. 1–10.

  5. Funaki, T., Kashyap, A.S., Mantooth, H.A., et al., Characterization of SiC JFET for temperature dependent device modeling, in Proceedings of the 2006 37th IEEE Power Electronics Specialists Conference, IEEE, 2006, pp. 1–6.

  6. Dvornikov, O.V., Dziatlau, V.L., Prokopenko, N.N., et al., The accounting of the simultaneous exposure of the low temperatures and the penetrating radiation at the circuit simulation of the BiJFET analog interfaces of the sensors, in Control and Communications (SIBCON), Proceedings of the 2017 International Siberian Conference, IEEE, 2017, pp. 1–6.

  7. Petrosyants, K.O., Ismail-zade, M.R., Sambursky, L.M., et al., Automation of parameter extraction procedure for Si JFET SPICE model in the –200°C…110°C temperature range, in Electronic and Networking Technologies (MWENT), Proceedings of the 2018 Moscow Workshop, IEEE, 2018, pp. 1–5.

  8. Petrosyants, K.O., Ismail-Zade, M.R., and Samburskii, L.M., Features of simulation of I–V characteristics of JFET transistors in the cryogenic temperature range, Izv. Vyssh. Uchebn. Zaved., Elektron., 2019, vol. 24, no. 2, pp. 174–184.

    Google Scholar 

  9. Li, Y., Niu, G., Cressler, J.D., et al., The operation of 0.35 μm partially depleted SOI CMOS technology in extreme environments, Solid-State Electron., 2003, vol. 47, no. 6, pp. 1111–1115.

    Article  Google Scholar 

Download references

Funding

This work was supported by the Program of Fundamental Research of the Higher School of Economics, Moscow, grant no. TZ-99 and the Russian Foundation for Basic Research, grant no. 18-07-00898-A.

Author information

Authors and Affiliations

Authors

Corresponding author

Correspondence to M. R. Ismail-Zade.

Rights and permissions

Reprints and permissions

About this article

Check for updates. Verify currency and authenticity via CrossMark

Cite this article

Ismail-Zade, M.R. JFET and MOSFET SPICE Models in a Wide Temperature Range. Russ Microelectron 50, 486–490 (2021). https://doi.org/10.1134/S1063739721070064

Download citation

  • Received:

  • Revised:

  • Accepted:

  • Published:

  • Issue Date:

  • DOI: https://doi.org/10.1134/S1063739721070064

Keywords:

Navigation